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-rw-r--r--src/main/stanza/compilers.stanza21
1 files changed, 10 insertions, 11 deletions
diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza
index cfc7824b..de775648 100644
--- a/src/main/stanza/compilers.stanza
+++ b/src/main/stanza/compilers.stanza
@@ -56,15 +56,13 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> :
;===============
ToWorkingIR()
;===============
- ResolveKinds()
- InferTypes()
- CheckTypes()
- ResolveGenders()
- CheckGenders()
- InferWidths()
- CheckWidths()
- ;===============
- Resolve()
+ ResolveKinds()
+ InferTypes()
+ CheckTypes()
+ ResolveGenders()
+ CheckGenders()
+ InferWidths()
+ CheckWidths()
;===============
ExpandConnects()
;===============
@@ -96,12 +94,14 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> :
InferWidths()
CheckWidths()
;===============
+ Verilog(with-output(c))
+ ;===============
;ToRealIR()
;Pad()
;CheckWidths()
;CheckHighForm()
;CheckLowForm()
- Verilog(with-output(c))
+ ;Verilog(with-output(c))
]
public defstruct StandardFIRRTL <: Compiler :
@@ -114,7 +114,6 @@ public defmethod passes (c:StandardFIRRTL) -> List<Pass> :
FIRRTL(with-output(c))
]
-
public defstruct StandardLoFIRRTL <: Compiler :
with-output : (() -> False) -> False with: (as-method => true)
public defmethod backend (c:StandardLoFIRRTL) -> List<Pass> :