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-rw-r--r--src/main/scala/firrtl/passes/memlib/DecorateMems.scala14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
index 412098fd..48e8041a 100644
--- a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
+++ b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
@@ -4,9 +4,17 @@ package firrtl
package passes
package memlib
-class CreateMemoryAnnotations(reader: Option[YamlFileReader]) extends Transform {
- def inputForm = MidForm
- def outputForm = MidForm
+import firrtl.options.PreservesAll
+import firrtl.stage.Forms
+
+class CreateMemoryAnnotations(reader: Option[YamlFileReader]) extends Transform
+ with DependencyAPIMigration
+ with PreservesAll[Transform] {
+
+ override def prerequisites = Forms.MidForm
+ override def optionalPrerequisites = Seq.empty
+ override def dependents = Forms.MidEmitters
+
def execute(state: CircuitState): CircuitState = reader match {
case None => state
case Some(r) =>