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-rw-r--r--src/main/scala/firrtl/passes/MemUtils.scala8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/MemUtils.scala b/src/main/scala/firrtl/passes/MemUtils.scala
index 798b02da..87033176 100644
--- a/src/main/scala/firrtl/passes/MemUtils.scala
+++ b/src/main/scala/firrtl/passes/MemUtils.scala
@@ -82,6 +82,14 @@ object toBitMask {
}
}
+object getWidth {
+ def apply(t: Type): Width = t match {
+ case t: GroundType => t.width
+ case _ => error("No width!")
+ }
+ def apply(e: Expression): Width = apply(e.tpe)
+}
+
object bitWidth {
def apply(dt: Type): BigInt = widthOf(dt)
private def widthOf(dt: Type): BigInt = dt match {