diff options
| -rw-r--r-- | src/main/scala/firrtl/stage/phases/WriteEmitted.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/stage/phases/WriteEmitted.scala b/src/main/scala/firrtl/stage/phases/WriteEmitted.scala index 90b0e123..647921d5 100644 --- a/src/main/scala/firrtl/stage/phases/WriteEmitted.scala +++ b/src/main/scala/firrtl/stage/phases/WriteEmitted.scala @@ -45,13 +45,13 @@ class WriteEmitted extends Phase { annotations.flatMap { case a: EmittedModuleAnnotation[_] => val target = FileUtils.getPath(sopts.getBuildFileName(a.value.name, Some(a.value.outputSuffix))) - os.write(target, a.value.value) + os.write.over(target, a.value.value) None case a: EmittedCircuitAnnotation[_] => val target = FileUtils.getPath( sopts.getBuildFileName(fopts.outputFileName.getOrElse(a.value.name), Some(a.value.outputSuffix)) ) - os.write(target, a.value.value) + os.write.over(target, a.value.value) None case a => Some(a) } |
