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| author | Andrew Waterman | 2016-02-08 21:31:49 -0800 |
|---|---|---|
| committer | Andrew Waterman | 2016-02-08 21:31:49 -0800 |
| commit | f0533bd701d372344af7e5827071148e9b37322c (patch) | |
| tree | 34cb1c533657a5a066de2378e512bdc67a517a4f /test | |
| parent | f3c4c604549db6bbe824c29649bb05bba7470d8a (diff) | |
| parent | 9dbdb3c87e7ddb75ac937678763b177e0b095523 (diff) | |
Merge pull request #60 from ucb-bar/escape-quote
Escape quotes before emitting Verilog
Diffstat (limited to 'test')
| -rw-r--r-- | test/passes/to-verilog/escape-quote.fir | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/passes/to-verilog/escape-quote.fir b/test/passes/to-verilog/escape-quote.fir new file mode 100644 index 00000000..224026a9 --- /dev/null +++ b/test/passes/to-verilog/escape-quote.fir @@ -0,0 +1,18 @@ +; RUN: firrtl -i %s -o %s.v -X verilog ; cat %s.v | FileCheck %s + +;CHECK: module top( +;CHECK: input clk +;CHECK: ); +;CHECK: always @(posedge clk) begin +;CHECK: `ifndef SYNTHESIS +;CHECK: if(1'h1) begin +;CHECK: $fwrite(32'h80000002,"This has an escaped quote (\") in it"); +;CHECK: end +;CHECK: `endif +;CHECK: end +;CHECK: endmodule + +circuit top : + module top : + input clk : Clock + printf(clk, UInt<1>(1), "This has an escaped quote (\") in it") |
