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authorazidar2016-01-27 15:59:48 -0800
committerazidar2016-01-28 09:25:05 -0800
commitcfedffd1fc7d5846e9f633bf13ea194b8ab2293d (patch)
treecd562172dfefecee621ba071b265d300533673ea /test
parentb6a370dbfbbc12d0674899aa075d613ec522c44b (diff)
Changed rmode to wmode
Diffstat (limited to 'test')
-rw-r--r--test/features/IsInvalid.fir2
-rw-r--r--test/features/Poison.fir2
-rw-r--r--test/passes/jacktest/Stack.fir2
3 files changed, 3 insertions, 3 deletions
diff --git a/test/features/IsInvalid.fir b/test/features/IsInvalid.fir
index f6766bf2..dc7c56b4 100644
--- a/test/features/IsInvalid.fir
+++ b/test/features/IsInvalid.fir
@@ -53,7 +53,7 @@ circuit Top :
;CHECK: m.w.addr is invalid
;CHECK: m.w.en is invalid
;CHECK: m.w.clk is invalid
-;CHECK: m.rw.rmode is invalid
+;CHECK: m.rw.wmode is invalid
;CHECK: m.rw.data[0] is invalid
;CHECK: m.rw.data[1] is invalid
;CHECK: m.rw.data[2] is invalid
diff --git a/test/features/Poison.fir b/test/features/Poison.fir
index a2e0acfb..9aafe63f 100644
--- a/test/features/Poison.fir
+++ b/test/features/Poison.fir
@@ -29,7 +29,7 @@ circuit Poison :
m.rw.clk <= clk
m.rw.addr <= index
m.rw.en <= UInt(1)
- m.rw.rmode <= UInt(1)
+ m.rw.wmode <= UInt(1)
m.rw.mask <= wmask
m.rw.data <= q
when p :
diff --git a/test/passes/jacktest/Stack.fir b/test/passes/jacktest/Stack.fir
index 162bac25..3eb9c67c 100644
--- a/test/passes/jacktest/Stack.fir
+++ b/test/passes/jacktest/Stack.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p cT 2>&1 | tee %s.out | FileCheck %s
;CHECK: Done!
circuit Stack :
module Stack :