merge

7 files changed, 142 insertions, 5 deletions

diff --git a/test/chisel3/ModuleVec.fir b/test/chisel3/ModuleVec.fir
new file mode 100644
index 00000000..7198667a
--- /dev/null
+++ b/test/chisel3/ModuleVec.fir
@@ -0,0 +1,30 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; CHECK: Done!
+circuit ModuleVec : 
+  module PlusOne : 
+    input in : UInt(32)
+    output out : UInt(32)
+    
+    node T_33 = UInt(1, 1)
+    node T_34 = add(in, T_33)
+    out := T_34
+  module PlusOne_25 : 
+    input in : UInt(32)
+    output out : UInt(32)
+    
+    node T_35 = UInt(1, 1)
+    node T_36 = add(in, T_35)
+    out := T_36
+  module ModuleVec : 
+    output ins : UInt(32)[2]
+    output outs : UInt(32)[2]
+    
+    inst T_37 of PlusOne
+    inst T_38 of PlusOne_25
+    wire pluses : {flip in : UInt(32), out : UInt(32)}[2]
+    pluses.0 := T_37
+    pluses.1 := T_38
+    pluses.s.in := ins.s
+    outs.0 := pluses.s.out
+    pluses.s.in := ins.1
+    outs.1 := pluses.1.out
diff --git a/test/passes/infer-widths/gcd.fir b/test/passes/infer-widths/gcd.fir
index a550326b..864852fb 100644
--- a/test/passes/infer-widths/gcd.fir
+++ b/test/passes/infer-widths/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cT | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cTd | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Widths
 circuit top :
diff --git a/test/passes/infer-widths/simple.fir b/test/passes/infer-widths/simple.fir
index 432030d5..50eb5452 100644
--- a/test/passes/infer-widths/simple.fir
+++ b/test/passes/infer-widths/simple.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cT | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cTwd | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Widths
 circuit top :
@@ -6,6 +6,14 @@ circuit top :
       wire e : UInt(30)
       reg y : UInt
       y := e
+
+      wire a : UInt(20)
+      wire b : UInt(10)
+      wire c : UInt
+      wire z : UInt
+       
+      z := mux(c,Pad(a,?),Pad(b,?))
+
    
 
 ; CHECK: Finished Infer Widths
diff --git a/test/passes/jacktest/SIntOps.fir b/test/passes/jacktest/SIntOps.fir
new file mode 100644
index 00000000..45ea68f2
--- /dev/null
+++ b/test/passes/jacktest/SIntOps.fir
@@ -0,0 +1,52 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit SIntOps : 
+  module SIntOps : 
+    input b : SInt(16)
+    input a : SInt(16)
+    output addout : SInt(16)
+    output subout : SInt(16)
+    output timesout : SInt(16)
+    output divout : SInt(16)
+    output modout : SInt(16)
+    output lshiftout : SInt(16)
+    output rshiftout : SInt(16)
+    output lessout : UInt(1)
+    output greatout : UInt(1)
+    output eqout : UInt(1)
+    output noteqout : UInt(1)
+    output lesseqout : UInt(1)
+    output greateqout : UInt(1)
+    output negout : SInt(16)
+    
+    node T_35 = add-wrap(a, b)
+    addout := T_35
+    node T_36 = sub-wrap(a, b)
+    subout := T_36
+    node T_37 = mul(a, b)
+    node T_38 = bits(T_37, 15, 0)
+    timesout := T_38
+    node T_39 = div(a, b)
+    divout := T_39
+    node T_40 = div(a, b)
+    modout := T_40
+    node T_41 = shl(a, 12)
+    node T_42 = bits(T_41, 15, 0)
+    lshiftout := T_42
+    node T_43 = shr(a, 8)
+    rshiftout := T_43
+    node T_44 = lt(a, b)
+    lessout := T_44
+    node T_45 = gt(a, b)
+    greatout := T_45
+    node T_46 = eq(a, b)
+    eqout := T_46
+    node T_47 = neq(a, b)
+    noteqout := T_47
+    node T_48 = leq(a, b)
+    lesseqout := T_48
+    node T_49 = geq(a, b)
+    greateqout := T_49
+    node T_50 = neg(a)
+    negout := T_50
diff --git a/test/passes/jacktest/UIntOps.fir b/test/passes/jacktest/UIntOps.fir
new file mode 100644
index 00000000..bb3e6293
--- /dev/null
+++ b/test/passes/jacktest/UIntOps.fir
@@ -0,0 +1,47 @@
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit UIntOps : 
+  module UIntOps : 
+    input b : UInt(16)
+    input a : UInt(16)
+    output addout : UInt(16)
+    output subout : UInt(16)
+    output timesout : UInt(16)
+    output divout : UInt(16)
+    output modout : UInt(16)
+    output lshiftout : UInt(16)
+    output rshiftout : UInt(16)
+    output lessout : UInt(1)
+    output greatout : UInt(1)
+    output eqout : UInt(1)
+    output noteqout : UInt(1)
+    output lesseqout : UInt(1)
+    output greateqout : UInt(1)
+    
+    node T_31 = add-wrap(a, b)
+    addout := T_31
+    node T_32 = sub-wrap(a, b)
+    subout := T_32
+    node T_33 = mul(a, b)
+    timesout := T_33
+    node T_34 = div(a, b)
+    divout := T_34
+    node T_35 = div(a, b)
+    modout := T_35
+    node T_36 = shl(a, 12)
+    lshiftout := T_36
+    node T_37 = shr(a, 8)
+    rshiftout := T_37
+    node T_38 = lt(a, b)
+    lessout := T_38
+    node T_39 = gt(a, b)
+    greatout := T_39
+    node T_40 = eq(a, b)
+    eqout := T_40
+    node T_41 = neq(a, b)
+    noteqout := T_41
+    node T_42 = leq(a, b)
+    lesseqout := T_42
+    node T_43 = geq(a, b)
+    greateqout := T_43
diff --git a/test/passes/jacktest/gcd.fir b/test/passes/jacktest/gcd.fir
index 92c6eb46..2d97ee8d 100644
--- a/test/passes/jacktest/gcd.fir
+++ b/test/passes/jacktest/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cw | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
 
 ;CHECK: To Flo
 circuit GCD : 
@@ -23,7 +23,7 @@ circuit GCD :
       y := b
     z := x
     node T_20 = UInt(0, 1)
-    node T_21 = eq(y, T_20)
+    node T_21 = eq(y, Pad(T_20,?))
     v := T_21
 
 ;CHECK: Finished To Flo
diff --git a/test/passes/jacktest/risc.fir b/test/passes/jacktest/risc.fir
index a7d35bf6..0a13e5c0 100644
--- a/test/passes/jacktest/risc.fir
+++ b/test/passes/jacktest/risc.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Expand Whens
 
 circuit Risc :