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authorazidar2015-02-19 08:28:54 -0800
committerazidar2015-02-19 08:28:54 -0800
commit8c1c4225c340dc658f7d0956e8b231050c122abc (patch)
tree93c438922163579d5f00b3f3984c0506f66f59fc /test/unit
parent50b5ce57d1b823a03725dd0aa2141f300c244bf1 (diff)
Added compiler flags to allow tests to select which passes they test.
Changed package names from chipper to firrtl
Diffstat (limited to 'test/unit')
-rw-r--r--test/unit/gcd.fir4
-rw-r--r--test/unit/simple.fir2
2 files changed, 5 insertions, 1 deletions
diff --git a/test/unit/gcd.fir b/test/unit/gcd.fir
index 1d4d54af..1da09070 100644
--- a/test/unit/gcd.fir
+++ b/test/unit/gcd.fir
@@ -1,9 +1,12 @@
+; RUN: firrtl %s ab | tee %s.out | FileCheck %s
+
circuit top :
module subtracter :
input x : UInt
input y : UInt
output z : UInt
z := sub-mod(x, y)
+; CHECK: port:z := sub-mod(port:x, port:y)
module gcd :
input a : UInt(16)
input b : UInt(16)
@@ -17,6 +20,7 @@ circuit top :
when greater(x, y) :
inst s of subtracter
s.x := x
+; CHECK: inst:s.x := reg:x
s.y := y
x := s.z
else :
diff --git a/test/unit/simple.fir b/test/unit/simple.fir
index 01389604..d00f8f7a 100644
--- a/test/unit/simple.fir
+++ b/test/unit/simple.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl %s | FileCheck %s
+; RUN: firrtl %s ab | tee %s.out | FileCheck %s
circuit top :
module subtracter :