aboutsummaryrefslogtreecommitdiff
path: root/test/passes
diff options
context:
space:
mode:
authorazidar2015-07-10 13:25:21 -0700
committerazidar2015-07-14 11:29:55 -0700
commit0bfb3618b654a4082cc2780887b3ca32e374f455 (patch)
tree230b7cbc96589be229e6f3d87f21300fb8fd84c3 /test/passes
parent0d63d521de85d1c6b9109e019101d0f575d063f7 (diff)
Added clock support
Diffstat (limited to 'test/passes')
-rw-r--r--test/passes/expand-accessors/accessor-mem.fir3
1 files changed, 2 insertions, 1 deletions
diff --git a/test/passes/expand-accessors/accessor-mem.fir b/test/passes/expand-accessors/accessor-mem.fir
index 0daec379..660ce77e 100644
--- a/test/passes/expand-accessors/accessor-mem.fir
+++ b/test/passes/expand-accessors/accessor-mem.fir
@@ -3,7 +3,8 @@
;CHECK: Expand Accessors
circuit top :
module top :
- cmem m : UInt<32>[2][2][2]
+ input clk : Clock
+ cmem m : UInt<32>[2][2][2], clk
wire i : UInt<4>
i := UInt(1)
infer accessor a = m[i] ;CHECK: read accessor a = m[i]