From 0bfb3618b654a4082cc2780887b3ca32e374f455 Mon Sep 17 00:00:00 2001
From: azidar
Date: Fri, 10 Jul 2015 13:25:21 -0700
Subject: Added clock support

---
 test/passes/expand-accessors/accessor-mem.fir | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'test/passes')

diff --git a/test/passes/expand-accessors/accessor-mem.fir b/test/passes/expand-accessors/accessor-mem.fir
index 0daec379..660ce77e 100644
--- a/test/passes/expand-accessors/accessor-mem.fir
+++ b/test/passes/expand-accessors/accessor-mem.fir
@@ -3,7 +3,8 @@
 ;CHECK: Expand Accessors
 circuit top :
    module top :
-      cmem m : UInt<32>[2][2][2]
+      input clk : Clock
+      cmem m : UInt<32>[2][2][2], clk
       wire i : UInt<4>
       i := UInt(1)
       infer accessor a = m[i] ;CHECK: read accessor a = m[i]
-- 
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