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authorazidar2016-01-31 12:59:31 -0800
committerazidar2016-02-09 18:57:06 -0800
commite985d47312458459e9ebe42fe99b5a063c08e637 (patch)
treed726c711e86d6e948a220a568dcae0a997629d18 /test/parser
parent2bd423fa061fb3e0973fa83e98f2877fd4616746 (diff)
Changed stanza output of UInt/SInt to include widths. Made tests match accordingly
Diffstat (limited to 'test/parser')
-rw-r--r--test/parser/bundle.fir26
1 files changed, 13 insertions, 13 deletions
diff --git a/test/parser/bundle.fir b/test/parser/bundle.fir
index dae02d2a..16a72a1b 100644
--- a/test/parser/bundle.fir
+++ b/test/parser/bundle.fir
@@ -24,21 +24,21 @@ circuit top :
; CHECK: circuit top :
; CHECK: module top :
; CHECK: wire z : { x : UInt, flip y : SInt}
-; CHECK: z.x <= UInt("h1")
-; CHECK: z.y <= SInt("h1")
+; CHECK: z.x <= UInt<1>("h1")
+; CHECK: z.y <= SInt<2>("h1")
; CHECK: node x = z.x
; CHECK: node y = z.y
; CHECK: wire a : UInt<3>[10]
-; CHECK: a[0] <= UInt("h1")
-; CHECK: a[1] <= UInt("h1")
-; CHECK: a[2] <= UInt("h1")
-; CHECK: a[3] <= UInt("h1")
-; CHECK: a[4] <= UInt("h1")
-; CHECK: a[5] <= UInt("h1")
-; CHECK: a[6] <= UInt("h1")
-; CHECK: a[7] <= UInt("h1")
-; CHECK: a[8] <= UInt("h1")
-; CHECK: a[9] <= UInt("h1")
+; CHECK: a[0] <= UInt<1>("h1")
+; CHECK: a[1] <= UInt<1>("h1")
+; CHECK: a[2] <= UInt<1>("h1")
+; CHECK: a[3] <= UInt<1>("h1")
+; CHECK: a[4] <= UInt<1>("h1")
+; CHECK: a[5] <= UInt<1>("h1")
+; CHECK: a[6] <= UInt<1>("h1")
+; CHECK: a[7] <= UInt<1>("h1")
+; CHECK: a[8] <= UInt<1>("h1")
+; CHECK: a[9] <= UInt<1>("h1")
; CHECK: node b = a[2]
-; CHECK: node c = a[UInt("h3")]
+; CHECK: node c = a[UInt<2>("h3")]