diff options
| author | azidar | 2015-12-10 14:36:33 -0800 |
|---|---|---|
| committer | azidar | 2016-01-16 11:45:00 -0800 |
| commit | fd35220712129f5f0074444008702af4aaf19ad2 (patch) | |
| tree | 8ac0a08ac325f452b11f4195b86640e65092669f /test/features/Stop.fir | |
| parent | 2beab33ac298470bc04caf1c3b7a5a0d17d465d4 (diff) | |
Finished adding clocks to Stop and Print
Diffstat (limited to 'test/features/Stop.fir')
| -rw-r--r-- | test/features/Stop.fir | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/test/features/Stop.fir b/test/features/Stop.fir index fc8869fa..16e25416 100644 --- a/test/features/Stop.fir +++ b/test/features/Stop.fir @@ -6,15 +6,16 @@ circuit Top : module Top : input p : UInt<1> input q : UInt<1> + input clk : Clock when p : - stop(0) + stop(clk,0) when q : - stop(1) - stop(3) + stop(clk,1) + stop(clk,3) -;CHECK: when p : stop(0) -;CHECK: when q : stop(1) -;CHECK: stop(3) +;CHECK: when p : stop(clk, 0) +;CHECK: when q : stop(clk, 1) +;CHECK: stop(clk, 3) ;CHECK: Done! |