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| author | azidar | 2015-12-11 12:40:32 -0800 |
|---|---|---|
| committer | azidar | 2016-01-16 11:45:00 -0800 |
| commit | 1d63b78f41ab3c3de88a5bb167f7412186dd677a (patch) | |
| tree | af5c66ca8aac0e870b17a634e1f4a96c9f9fc832 /test/features/ExModule.fir | |
| parent | e562ef9773d5c9e368878a01c53b168fde36e9a0 (diff) | |
Stop now emits correct verilog to stop simulation, required passing a string not and integer
Diffstat (limited to 'test/features/ExModule.fir')
0 files changed, 0 insertions, 0 deletions