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authorazidar2016-01-16 15:24:50 -0800
committerazidar2016-01-16 15:24:50 -0800
commit9dcb5684957e684174d97a45f80d1cfad887a741 (patch)
tree1c8b53f66bb59cc39d2931910459470f0495c71a /test/errors
parented20e7c6c77543756e1ebc7bc1e6ae7d10911f0a (diff)
parentc4271d9e428bba7b447ed6d18fb11729d2b61b22 (diff)
Merge branch 'new-mem' of github.com:ucb-bar/firrtl into scala-new-mem
Diffstat (limited to 'test/errors')
-rw-r--r--test/errors/type/NodeWithFlips.fir2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/errors/type/NodeWithFlips.fir b/test/errors/type/NodeWithFlips.fir
index 80c2b160..0b8b9e6b 100644
--- a/test/errors/type/NodeWithFlips.fir
+++ b/test/errors/type/NodeWithFlips.fir
@@ -1,5 +1,5 @@
; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
-; CHECK: Node cannot be a bundle type with flips.
+; CHECK: Node must be a ground type.
circuit Top :
module Top :