Changed all tests to use verilog backend.

13 files changed, 13 insertions, 13 deletions

diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
index c1a3702a..38935b57 100644
--- a/test/errors/high-form/Flip-Mem.fir
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Memory mc cannot be a bundle type with flips.
 ; CHECK: Memory ms cannot be a bundle type with flips.
 
diff --git a/test/errors/high-form/Flip-Poison.fir b/test/errors/high-form/Flip-Poison.fir
index 95a8c471..278d3b74 100644
--- a/test/errors/high-form/Flip-Poison.fir
+++ b/test/errors/high-form/Flip-Poison.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Poison p cannot be a bundle type with flips.
 
 circuit Flip-Poison : 
diff --git a/test/errors/high-form/InstanceNotModule.fir b/test/errors/high-form/InstanceNotModule.fir
index 7c4d152a..aa49b26b 100644
--- a/test/errors/high-form/InstanceNotModule.fir
+++ b/test/errors/high-form/InstanceNotModule.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Module Top2 is not defined.
 
 circuit Top :
diff --git a/test/errors/high-form/InvalidLOC.fir b/test/errors/high-form/InvalidLOC.fir
index a4cc49ef..a0a3cea9 100644
--- a/test/errors/high-form/InvalidLOC.fir
+++ b/test/errors/high-form/InvalidLOC.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
diff --git a/test/errors/high-form/InvalidSubexp.fir b/test/errors/high-form/InvalidSubexp.fir
index 8116cc2f..07f529d2 100644
--- a/test/errors/high-form/InvalidSubexp.fir
+++ b/test/errors/high-form/InvalidSubexp.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Invalid index access to non-reference.
 ; CHECK: Invalid subfield access to non-reference.
 
diff --git a/test/errors/high-form/NegUInt.fir b/test/errors/high-form/NegUInt.fir
index a793cdb9..35f25013 100644
--- a/test/errors/high-form/NegUInt.fir
+++ b/test/errors/high-form/NegUInt.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: UIntValue cannot be negative.
 
 circuit Top :
diff --git a/test/errors/high-form/NegVecSize.fir b/test/errors/high-form/NegVecSize.fir
index 16fae565..8a89d4e6 100644
--- a/test/errors/high-form/NegVecSize.fir
+++ b/test/errors/high-form/NegVecSize.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Vector type size cannot be negative
 
 circuit Top : 
diff --git a/test/errors/high-form/NegWidth.fir b/test/errors/high-form/NegWidth.fir
index 3f305301..9b055228 100644
--- a/test/errors/high-form/NegWidth.fir
+++ b/test/errors/high-form/NegWidth.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Width cannot be negative.
 
 circuit Top : 
diff --git a/test/errors/high-form/NumArgs.fir b/test/errors/high-form/NumArgs.fir
index 4dc8ad46..6c083905 100644
--- a/test/errors/high-form/NumArgs.fir
+++ b/test/errors/high-form/NumArgs.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Primop mux requires 3 expression arguments.
 ; CHECK: Primop add requires 2 expression arguments.
 ; CHECK: Primop bits requires 2 integer arguments.
diff --git a/test/errors/high-form/Prefix.fir b/test/errors/high-form/Prefix.fir
index 03908f1c..ed5245b3 100644
--- a/test/errors/high-form/Prefix.fir
+++ b/test/errors/high-form/Prefix.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Reference x$y and x share a prefix.
 ; XFAIL: *
 
diff --git a/test/errors/high-form/RemoveChar.fir b/test/errors/high-form/RemoveChar.fir
index c9c2286e..74c4a092 100644
--- a/test/errors/high-form/RemoveChar.fir
+++ b/test/errors/high-form/RemoveChar.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c 2>&1 | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit Top :
diff --git a/test/errors/high-form/Top.fir b/test/errors/high-form/Top.fir
index 1029d502..ddeb9c3b 100644
--- a/test/errors/high-form/Top.fir
+++ b/test/errors/high-form/Top.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 
 ; CHECK: A single module must be named Top.
 
diff --git a/test/errors/high-form/Unique.fir b/test/errors/high-form/Unique.fir
index 354454fa..ea2bb881 100644
--- a/test/errors/high-form/Unique.fir
+++ b/test/errors/high-form/Unique.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
 ; XFAIL: *
 
 ; CHECK: Reference x does not have a unique name.