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| author | azidar | 2015-10-01 09:59:38 -0700 |
|---|---|---|
| committer | azidar | 2015-10-01 09:59:38 -0700 |
| commit | 4726d8b6ca56435d861cb74f52f1237e3b43ae38 (patch) | |
| tree | e0ba1ef6fbcc06c515b3ffe16aaadd3a2fff5170 /test/errors/high-form/RemoveScope.fir | |
| parent | 1f004616b045d3d8df18a87c252333361739c66d (diff) | |
Updated tests for previous change that removed RemoveScope test from the StandardVerilogCompiler
Diffstat (limited to 'test/errors/high-form/RemoveScope.fir')
| -rw-r--r-- | test/errors/high-form/RemoveScope.fir | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/test/errors/high-form/RemoveScope.fir b/test/errors/high-form/RemoveScope.fir index 395c6492..16498fd8 100644 --- a/test/errors/high-form/RemoveScope.fir +++ b/test/errors/high-form/RemoveScope.fir @@ -1,4 +1,5 @@ ; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s +; XFAIL: * ; CHECK: Done! circuit Top : |