diff options
| author | Albert Magyar | 2020-04-15 18:10:05 -0700 |
|---|---|---|
| committer | Albert Magyar | 2020-04-20 15:23:35 -0700 |
| commit | ee6f11ea4300552a963bb07fbda17a84ef2e024e (patch) | |
| tree | cc83533ae512b241ea46254130498dbe646a2e44 /src | |
| parent | 0407a53bd76b41deed44dffbe08ca252536ab53c (diff) | |
Avoid casting 2-bit interval to AsyncReset in test
Diffstat (limited to 'src')
| -rw-r--r-- | src/test/scala/firrtlTests/AsyncResetSpec.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/scala/firrtlTests/AsyncResetSpec.scala b/src/test/scala/firrtlTests/AsyncResetSpec.scala index 34211946..29c09787 100644 --- a/src/test/scala/firrtlTests/AsyncResetSpec.scala +++ b/src/test/scala/firrtlTests/AsyncResetSpec.scala @@ -80,7 +80,7 @@ class AsyncResetSpec extends FirrtlFlatSpec { |input c : Clock |input d : Fixed<1><<0>> |input e : AsyncReset - |input f : Interval[0, 1].0 + |input f : Interval[0, 0].0 |output u : AsyncReset |output v : AsyncReset |output w : AsyncReset |