diff options
| author | Jack Koenig | 2016-09-15 13:11:49 -0700 |
|---|---|---|
| committer | Donggyu | 2016-09-15 13:11:49 -0700 |
| commit | edcd5bbcdecf2fafb436a93adea2e5d72c0cdc4d (patch) | |
| tree | 4f7100ed6290886ff1f717bda8b15a321760f32a /src | |
| parent | 30ae710af4b8882fa1cab449cc9cff08686a6c70 (diff) | |
Fix non-determinism bug in ExpandWhens (#303)
Despite the fact that LinkedHashMaps preserve insertion order in traversal, it
appears that .keys and .keySet return Sets that do not provide the same
guarantee
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/passes/ExpandWhens.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/ExpandWhens.scala b/src/main/scala/firrtl/passes/ExpandWhens.scala index 4cc0bdb9..cd85c18a 100644 --- a/src/main/scala/firrtl/passes/ExpandWhens.scala +++ b/src/main/scala/firrtl/passes/ExpandWhens.scala @@ -114,9 +114,9 @@ object ExpandWhens extends Pass { val conseqStmt = expandWhens(conseqNetlist, netlist +: defaults, AND(p, s.pred))(s.conseq) val altStmt = expandWhens(altNetlist, netlist +: defaults, AND(p, NOT(s.pred)))(s.alt) - // Process combined set of keys because we only want to create 1 mux for each node - // being connected to in the conseq and/or alt - val memos = (conseqNetlist.keySet ++ altNetlist.keySet) map { lvalue => + // Process combined maps because we only want to create 1 mux for each node + // present in the conseq and/or alt + val memos = (conseqNetlist ++ altNetlist) map { case (lvalue, _) => // Defaults in netlist get priority over those in defaults val default = netlist get lvalue match { case Some(v) => Some(v) |