diff options
| author | azidar | 2016-01-24 16:31:17 -0800 |
|---|---|---|
| committer | azidar | 2016-01-24 16:31:17 -0800 |
| commit | a899ff3606421467400380fc35a6035290bef791 (patch) | |
| tree | f86cb673cfbb88c175dfa2467c6ea198e135357d /src | |
| parent | 8265e2e67e39f2d313a74bccb6dd45d85f706f3a (diff) | |
Made CInfer robust to high firrtl errors
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/stanza/chirrtl.stanza | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/stanza/chirrtl.stanza b/src/main/stanza/chirrtl.stanza index fdd8424b..684ad53c 100644 --- a/src/main/stanza/chirrtl.stanza +++ b/src/main/stanza/chirrtl.stanza @@ -94,7 +94,7 @@ defn infer-types (c:Circuit) -> Circuit : val types = HashTable<Symbol,Type>(symbol-hash) defn infer-types-e (e:Expression) -> Expression : match(map(infer-types-e,e)) : - (e:Ref) : Ref(name(e), types[name(e)]) + (e:Ref) : Ref(name(e), get?(types,name(e),UnknownType())) (e:SubField) : SubField(exp(e),name(e),field-type(type(exp(e)),name(e))) (e:SubIndex) : SubIndex(exp(e),value(e),sub-type(type(exp(e)))) (e:SubAccess) : SubAccess(exp(e),index(e),sub-type(type(exp(e)))) @@ -119,14 +119,14 @@ defn infer-types (c:Circuit) -> Circuit : types[name(s)] = get-type(s) s (s:CDefMPort) : - val t = types[mem(s)] + val t = get?(types,mem(s),UnknownType()) types[name(s)] = t CDefMPort(info(s),name(s),t,mem(s),exps(s),direction(s)) (s:CDefMemory) : types[name(s)] = type(s) s (s:DefInstance) : - types[name(s)] = module-types[module(s)] + types[name(s)] = get?(module-types,module(s),UnknownType()) s (s) : map{infer-types-e,_} $ map(infer-types-s,s) for p in ports(m) do : |
