aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorjackbackrack2015-04-24 14:59:25 -0700
committerjackbackrack2015-04-24 14:59:25 -0700
commita6c3403e3037c7b34c8715a9566d038ddf3b8345 (patch)
tree47655c157e5996a9ab53451c4165c3ddfeeb5eea /src
parentdfd369b8fc83749d0421cf72d243efb3683f65d8 (diff)
parent2006198a53328e3898bcbe69429b751c065ea802 (diff)
merge
Diffstat (limited to 'src')
-rw-r--r--src/main/stanza/primop.stanza2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza
index a1e9633f..a6b42e7c 100644
--- a/src/main/stanza/primop.stanza
+++ b/src/main/stanza/primop.stanza
@@ -279,7 +279,7 @@ public defn primop-gen-constraints (e:DoPrim,v:Vector<WGeq>) -> Type :
val w-var = VarWidth(gensym(`w))
val w* =
if not contains?(all-args-not-equal,op(e)) :
- val max-args-w = all-equal(List(w-var,map(width!,args(e))))
+ val max-args-w = all-equal(map(width!,args(e)))
switch {op(e) == _} :
ADD-UU-OP : PlusWidth(max-args-w,IntWidth(1))
ADD-US-OP : PlusWidth(max-args-w,IntWidth(1))