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authorJim Lawson2016-12-14 17:01:10 -0800
committerJim Lawson2016-12-14 17:01:10 -0800
commit73529eda60a3e411f3270c2bf7097234a4901ab0 (patch)
treefbf6ea27111ca79dc02de847c83dd08245214026 /src
parent0f13cace653fa45e907f59a060b6acd93c7bce2a (diff)
Remove scalpels.
Diffstat (limited to 'src')
-rw-r--r--src/test/scala/firrtlTests/CompilerTests.scala2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/test/scala/firrtlTests/CompilerTests.scala b/src/test/scala/firrtlTests/CompilerTests.scala
index 8ec7665c..a9fce0c2 100644
--- a/src/test/scala/firrtlTests/CompilerTests.scala
+++ b/src/test/scala/firrtlTests/CompilerTests.scala
@@ -93,8 +93,6 @@ circuit Top :
" b <= _GEN_0\n\n"
).reduce(_ + "\n" + _)
"A circuit" should "match exactly to its MidForm state" in {
- val parsedOutput = parse(getOutput)
- val checkedOutput = parse(check)
(parse(getOutput)) should be (parse(check))
}
}