Support octal and binary literal formats as described in the spec

* Fixes #1464

3 files changed, 56 insertions, 0 deletions

diff --git a/src/main/antlr4/FIRRTL.g4 b/src/main/antlr4/FIRRTL.g4
index 0035423b..39988e18 100644
--- a/src/main/antlr4/FIRRTL.g4
+++ b/src/main/antlr4/FIRRTL.g4
@@ -186,6 +186,8 @@ intLit
   : UnsignedInt
   | SignedInt
   | HexLit
+  | OctalLit
+  | BinaryLit
   ;
 
 lowerBound
@@ -320,6 +322,14 @@ HexLit
   : '"' 'h' ( '+' | '-' )? ( HexDigit )+ '"'
   ;
 
+OctalLit
+  : '"' 'o' ( '+' | '-' )? ( OctalDigit )+ '"'
+  ;
+
+BinaryLit
+  : '"' 'b' ( '+' | '-' )? ( BinaryDigit )+ '"'
+  ;
+
 DoubleLit
   : ( '+' | '-' )? Digit+ '.' Digit+ ( 'E' ( '+' | '-' )? Digit+ )?
   ;
@@ -334,6 +344,16 @@ HexDigit
   : [a-fA-F0-9]
   ;
 
+fragment
+OctalDigit
+  : [0-7]
+  ;
+
+fragment
+BinaryDigit
+  : [01]
+  ;
+
 StringLit
   : '"' UnquotedString? '"'
   ;
diff --git a/src/main/scala/firrtl/Visitor.scala b/src/main/scala/firrtl/Visitor.scala
index 112343d1..084a3006 100644
--- a/src/main/scala/firrtl/Visitor.scala
+++ b/src/main/scala/firrtl/Visitor.scala
@@ -28,6 +28,8 @@ class Visitor(infoMode: InfoMode) extends AbstractParseTreeVisitor[FirrtlNode] w
 
   //  These regex have to change if grammar changes
   private val HexPattern = """\"*h([+\-]?[a-zA-Z0-9]+)\"*""".r
+  private val OctalPattern = """\"*o([+\-]?[0-7]+)\"*""".r
+  private val BinaryPattern = """\"*b([+\-]?[01]+)\"*""".r
   private val DecPattern = """([+\-]?[1-9]\d*)""".r
   private val ZeroPattern = "0".r
   private val DecimalPattern = """([+\-]?[0-9]\d*\.[0-9]\d*)""".r
@@ -37,6 +39,8 @@ class Visitor(infoMode: InfoMode) extends AbstractParseTreeVisitor[FirrtlNode] w
     s match {
       case ZeroPattern(_*) => BigInt(0)
       case HexPattern(hexdigits) => BigInt(hexdigits, 16)
+      case OctalPattern(octaldigits) => BigInt(octaldigits, 8)
+      case BinaryPattern(binarydigits) => BigInt(binarydigits, 2)
       case DecPattern(num) => BigInt(num, 10)
       case _ => throw new Exception("Invalid String for conversion to BigInt " + s)
     }
diff --git a/src/test/scala/firrtlTests/ParserSpec.scala b/src/test/scala/firrtlTests/ParserSpec.scala
index 3958bfad..392be8cf 100644
--- a/src/test/scala/firrtlTests/ParserSpec.scala
+++ b/src/test/scala/firrtlTests/ParserSpec.scala
@@ -117,6 +117,38 @@ class ParserSpec extends FirrtlFlatSpec {
     firrtl.Parser.parse(c.serialize)
   }
 
+  // ********** Literal Formats **********
+  "Literals of different bases and signs" should "produce correct values" in {
+    def circuit(lit: String): firrtl.ir.Circuit = {
+      val input = s"""circuit Top :
+                     |  module lits:
+                     |    output litout : SInt<16>
+                     |    litout <= SInt(${lit})
+                     |""".stripMargin
+      firrtl.Parser.parse(input)
+    }
+
+    def check(inFormat: String, ref: Integer): Unit = {
+      (circuit(inFormat)) should be (circuit(ref.toString))
+    }
+
+    val checks = Map(
+      """       12 """ -> 12,
+      """      -14 """ -> -14,
+      """      +15 """ -> 15,
+      """     "hA" """ -> 10,
+      """    "h-C" """ -> -12,
+      """   "h+1B" """ -> 27,
+      """    "o66" """ -> 54,
+      """   "o-33" """ -> -27,
+      """  "b1101" """ -> 13,
+      """ "b-1001" """ -> -9,
+      """ "b+1000" """ -> 8
+    )
+
+    checks.foreach { case (k, v) => check(k, v) }
+   }
+
   // ********** Doubles as parameters **********
   "Doubles" should "be legal parameters for extmodules" in {
     val nums = Seq("1.0", "7.6", "3.00004", "1.0E10", "1.0023E-17")