Bugfix: renaming instance ports was broken. (#588)

2 files changed, 14 insertions, 5 deletions

diff --git a/src/main/scala/firrtl/passes/LowerTypes.scala b/src/main/scala/firrtl/passes/LowerTypes.scala
index 6b1b5d66..663241d3 100644
--- a/src/main/scala/firrtl/passes/LowerTypes.scala
+++ b/src/main/scala/firrtl/passes/LowerTypes.scala
@@ -45,16 +45,16 @@ object LowerTypes extends Transform {
   def renameExps(renames: RenameMap, e: Expression, root: String): Seq[String] = e.tpe match {
     case (_: GroundType) =>
       val name = root + loweredName(e)
-      renames.rename(e.serialize, name)
+      renames.rename(root + e.serialize, name)
       Seq(name)
     case (t: BundleType) => t.fields.foldLeft(Seq[String]()){(names, f) =>
       val subNames = renameExps(renames, WSubField(e, f.name, f.tpe, times(gender(e), f.flip)), root)
-      renames.rename(e.serialize, subNames)
+      renames.rename(root + e.serialize, subNames)
       names ++ subNames
     }
     case (t: VectorType) => (0 until t.size).foldLeft(Seq[String]()){(names, i) =>
       val subNames = renameExps(renames, WSubIndex(e, i, t.tpe,gender(e)), root)
-      renames.rename(e.serialize, subNames)
+      renames.rename(root + e.serialize, subNames)
       names ++ subNames
     }
   }
@@ -189,7 +189,7 @@ object LowerTypes extends Transform {
       case sx: WDefInstance => sx.tpe match {
         case t: BundleType =>
           val fieldsx = t.fields flatMap { f =>
-            renameExps(renames, f.name, sx.tpe, s"${sx.name}.")
+            renameExps(renames, f.name, f.tpe, s"${sx.name}.")
             create_exps(WRef(f.name, f.tpe, ExpKind, times(f.flip, MALE))) map { e => 
               // Flip because inst genders are reversed from Module type
               Field(loweredName(e), swap(to_flip(gender(e))), e.tpe)
diff --git a/src/test/scala/firrtlTests/AnnotationTests.scala b/src/test/scala/firrtlTests/AnnotationTests.scala
index 44964eba..e3dd3dbd 100644
--- a/src/test/scala/firrtlTests/AnnotationTests.scala
+++ b/src/test/scala/firrtlTests/AnnotationTests.scala
@@ -416,7 +416,7 @@ class AnnotationTests extends AnnotationSpec with Matchers {
     resultAnno should contain (anno("out_b_1"))
   }
 
-  ignore should "track deleted modules AND instances in dce" in {
+  "Renaming" should "track deleted modules AND instances in dce" in {
     val compiler = new VerilogCompiler
     val input =
      """circuit Top :
@@ -445,6 +445,15 @@ class AnnotationTests extends AnnotationSpec with Matchers {
       anno("foo", mod = "DeadExt"), anno("bar", mod = "DeadExt")
     )
     val result = compiler.compile(CircuitState(parse(input), ChirrtlForm, getAMap(annos)), Nil)
+    /* Uncomment to help debug
+    println(result.circuit.serialize)
+    result.annotations.get.annotations.foreach{ a =>
+      a match {
+        case DeletedAnnotation(xform, anno) => println(s"$xform deleted: ${a.target}")
+        case Annotation(target, _, _) => println(s"not deleted: $target")
+      }
+    }
+    */
     val resultAnno = result.annotations.get.annotations
 
     resultAnno should contain (manno("Top"))