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authorNick Hynes2019-02-21 08:12:30 -0800
committerAdam Izraelevitz2019-02-21 08:12:30 -0800
commit021ecd1029f74e176f30e509d56cd00c98669791 (patch)
tree7c96571d8d20b2a7b3eb1a4dfc5b44083c08f377 /src
parentafdb780aeca80c1fed94dd20fd22037490169472 (diff)
Correctly handle dots in loaded memory paths (#984)
* Correctly handle dots in loaded memory paths * Added test for loadmem filename
Diffstat (limited to 'src')
-rw-r--r--src/main/scala/firrtl/annotations/LoadMemoryAnnotation.scala28
-rw-r--r--src/test/scala/firrtlTests/annotationTests/LoadMemoryAnnotationSpec.scala29
2 files changed, 40 insertions, 17 deletions
diff --git a/src/main/scala/firrtl/annotations/LoadMemoryAnnotation.scala b/src/main/scala/firrtl/annotations/LoadMemoryAnnotation.scala
index 52022f87..7c7ef096 100644
--- a/src/main/scala/firrtl/annotations/LoadMemoryAnnotation.scala
+++ b/src/main/scala/firrtl/annotations/LoadMemoryAnnotation.scala
@@ -2,6 +2,8 @@
package firrtl.annotations
+import java.io.File
+
/**
* Enumeration of the two types of readmem statements available in verilog
*/
@@ -33,26 +35,20 @@ case class LoadMemoryAnnotation(
(name, "")
case "" :: name :: Nil => // this case handles a filename that begins with dot and has no suffix
("." + name, "")
- case other =>
- (other.reverse.tail.reverse.mkString("."), "." + other.last)
- }
- }
-
- def getFileName: String = {
- originalMemoryNameOpt match {
- case Some(originalMemoryName) =>
- if(target.name == originalMemoryName) {
- prefix + suffix
+ case other => {
+ if (other.last.indexOf(File.separator) != -1) {
+ (fileName, "")
+ } else {
+ (other.reverse.tail.reverse.mkString("."), "." + other.last)
}
- else {
- prefix + target.name.drop(originalMemoryName.length) + suffix
- }
- case _ =>
- fileName
+ }
}
}
+ def getPrefix: String =
+ prefix + originalMemoryNameOpt.map(n => target.name.drop(n.length)).getOrElse("")
def getSuffix: String = suffix
+ def getFileName: String = getPrefix + getSuffix
def duplicate(newNamed: Named): LoadMemoryAnnotation = {
newNamed match {
@@ -63,5 +59,3 @@ case class LoadMemoryAnnotation(
}
}
}
-
-
diff --git a/src/test/scala/firrtlTests/annotationTests/LoadMemoryAnnotationSpec.scala b/src/test/scala/firrtlTests/annotationTests/LoadMemoryAnnotationSpec.scala
new file mode 100644
index 00000000..15b12d52
--- /dev/null
+++ b/src/test/scala/firrtlTests/annotationTests/LoadMemoryAnnotationSpec.scala
@@ -0,0 +1,29 @@
+// See LICENSE for license details.
+
+package firrtlTests.annotationTests
+
+import firrtl.annotations.{CircuitName, ComponentName, LoadMemoryAnnotation, ModuleName}
+import org.scalatest.{FreeSpec, Matchers}
+
+class LoadMemoryAnnotationSpec extends FreeSpec with Matchers {
+ "LoadMemoryAnnotation getFileName" - {
+ "add name of subcomponent to file name when a memory was split" in {
+ val lma = new LoadMemoryAnnotation(
+ ComponentName("init_mem_subdata", ModuleName("b", CircuitName("c"))),
+ "somepath/init_mem",
+ originalMemoryNameOpt = Some("init_mem")
+ )
+
+ lma.getFileName should be("somepath/init_mem_subdata")
+ }
+ "and do that properly when there are dots in earlier sections of the path" in {
+ val lma = new LoadMemoryAnnotation(
+ ComponentName("init_mem_subdata", ModuleName("b", CircuitName("c"))),
+ "./target/scala-2.12/test-classes/init_mem",
+ originalMemoryNameOpt = Some("init_mem")
+ )
+
+ lma.getFileName should be("./target/scala-2.12/test-classes/init_mem_subdata")
+ }
+ }
+}