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authorAlbert Magyar2017-03-30 19:08:20 -0700
committerAlbert Magyar2017-04-03 12:02:21 -0700
commite40660622d39995b46c174b56f95f4d6ce3dee02 (patch)
treea5ce8a5cc471e383287cd45bc4ed5a1833a9de14 /src/test
parentbda2bd363fbe66de9425bba12d96f5f9816a43ce (diff)
Find a single cycle from potentially many in a combinational SCC
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/firrtlTests/CheckCombLoopsSpec.scala23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala
index 16482560..d6d4f02e 100644
--- a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala
+++ b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala
@@ -123,5 +123,28 @@ class CheckCombLoopsSpec extends SimpleTransformSpec {
}
}
+ "Multiple simple loops in one SCC" should "throw an exception" in {
+ val input = """circuit hasloops :
+ | module hasloops :
+ | input i : UInt<1>
+ | output o : UInt<1>
+ | wire a : UInt<1>
+ | wire b : UInt<1>
+ | wire c : UInt<1>
+ | wire d : UInt<1>
+ | wire e : UInt<1>
+ | a <= and(c,i)
+ | b <= and(a,d)
+ | c <= b
+ | d <= and(c,e)
+ | e <= b
+ | o <= e
+ |""".stripMargin
+
+ val writer = new java.io.StringWriter
+ intercept[CheckCombLoops.CombLoopException] {
+ compile(CircuitState(parse(input), ChirrtlForm, None), writer)
+ }
+ }
}