Addresses #459. Rewords transform annotations API.

Now, any annotation not propagated by a transform is considered deleted.
A new DeletedAnnotation is added in place of it.

4 files changed, 27 insertions, 1 deletions

diff --git a/src/test/scala/firrtlTests/AnnotationTests.scala b/src/test/scala/firrtlTests/AnnotationTests.scala
index 29f8f51a..534b6540 100644
--- a/src/test/scala/firrtlTests/AnnotationTests.scala
+++ b/src/test/scala/firrtlTests/AnnotationTests.scala
@@ -121,4 +121,25 @@ class AnnotationTests extends AnnotationSpec with Matchers {
       beforeAnno should be (afterAnno)
     }
   }
+
+  "Deleting annotations" should "create a DeletedAnnotation" in {
+    val compiler = new VerilogCompiler
+    val input =
+     """circuit Top :
+        |  module Top :
+        |    input in: UInt<3>
+        |""".stripMargin
+    class DeletingTransform extends Transform {
+      val inputForm = LowForm
+      val outputForm = LowForm
+      def execute(state: CircuitState) = state.copy(annotations = None)
+    }
+    val anno = InlineAnnotation(CircuitName("Top"))
+    val annoOpt = Some(AnnotationMap(Seq(anno)))
+    val writer = new StringWriter()
+    val result = compiler.compile(CircuitState(parse(input), ChirrtlForm, annoOpt), writer, Seq(new DeletingTransform))
+    result.annotations.get.annotations.head should matchPattern {
+      case DeletedAnnotation(x, anno) =>
+    }
+  }
 }
diff --git a/src/test/scala/firrtlTests/InlineInstancesTests.scala b/src/test/scala/firrtlTests/InlineInstancesTests.scala
index 25a194d4..a3b7386d 100644
--- a/src/test/scala/firrtlTests/InlineInstancesTests.scala
+++ b/src/test/scala/firrtlTests/InlineInstancesTests.scala
@@ -17,6 +17,8 @@ import firrtl.annotations.{
    Annotation
 }
 import firrtl.passes.{InlineInstances, InlineAnnotation}
+import logger.Logger
+import logger.LogLevel.Debug
 
 
 /**
@@ -24,6 +26,8 @@ import firrtl.passes.{InlineInstances, InlineAnnotation}
  */
 class InlineInstancesTests extends LowTransformSpec {
    def transform = new InlineInstances
+   // Set this to debug
+   // Logger.setClassLogLevels(Map(this.getClass.getName -> Debug))
    "The module Inline" should "be inlined" in {
       val input =
          """circuit Top :
diff --git a/src/test/scala/firrtlTests/PassTests.scala b/src/test/scala/firrtlTests/PassTests.scala
index df56c097..8e5d74ad 100644
--- a/src/test/scala/firrtlTests/PassTests.scala
+++ b/src/test/scala/firrtlTests/PassTests.scala
@@ -2,7 +2,6 @@
 
 package firrtlTests
 
-import com.typesafe.scalalogging.LazyLogging
 import java.io.{StringWriter,Writer}
 import org.scalatest.{FlatSpec, Matchers}
 import org.scalatest.junit.JUnitRunner
diff --git a/src/test/scala/firrtlTests/ReplSeqMemTests.scala b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
index 1a5b44e6..93aec7f4 100644
--- a/src/test/scala/firrtlTests/ReplSeqMemTests.scala
+++ b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
@@ -7,6 +7,8 @@ import firrtl.ir._
 import firrtl.passes._
 import firrtl.passes.memlib._
 import annotations._
+import logger.Logger
+import logger.LogLevel.Debug
 
 class ReplSeqMemSpec extends SimpleTransformSpec {
   def emitter = new LowFirrtlEmitter