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| author | Albert Magyar | 2021-03-09 22:25:55 -0800 |
|---|---|---|
| committer | Albert Magyar | 2021-04-05 12:00:02 -0700 |
| commit | 8a9dfa8b0324b3f52e676b9d27912656c43dd327 (patch) | |
| tree | 2c4b12eef16d70443300535b37865ff45eea57e6 /src/test | |
| parent | a90cf1105467cab7c6708ea3faae35e1454cb0fd (diff) | |
Optionally allow simple SyncReadMems to pass through VerilogMemDelays
* This is enabled by adding a PassthroughSimpleSyncReadMemsAnnotation
* Can be emitted directly with new changes to the Verilog emitter
* Add some new deprecations to VerilogMemDelays
* Run scalafmt on VerilogMemDelays
Diffstat (limited to 'src/test')
0 files changed, 0 insertions, 0 deletions