Finer grained control over randomization

We previously had `ifdef guards on some parts of the emitted verilog to
control whether some registers or nets should be given random initial
values. These guards were all dependent on the RANDOMIZE macro.

However, there were actually three separate cases being controlled

 1. Giving random values to disconnected wires
 2. Random initialization of registers
 3. Random initialization of memories

It is possible that the designer would want to switch these three on or
off independently in simulation. For instance, the latter two are
usually safe because registers and memories will get some definite
binary value at power on in the actual circuit, but the first one can
be quite dangerous because the undriven wire could be metastable.

This change provides separate macros for each of the three sets of
guards so that they can be controlled independently.

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