diff options
| author | Albert Magyar | 2017-11-10 14:02:39 -0800 |
|---|---|---|
| committer | Jack Koenig | 2017-11-10 14:02:39 -0800 |
| commit | 7d86a35e19519d92dc436c07359d5120b44b5a85 (patch) | |
| tree | 230cf0220d373f0840e337586c983920bf3e71b6 /src/test | |
| parent | 8ed378dfc9be7e5ebaff1e6b7393b5b991ea691d (diff) | |
Make digraph methods deterministic (#653)
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/firrtlTests/CheckCombLoopsSpec.scala | 25 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/analyses/InstanceGraphTests.scala | 2 | ||||
| -rw-r--r-- | src/test/scala/firrtlTests/graph/DiGraphTests.scala | 4 |
3 files changed, 28 insertions, 3 deletions
diff --git a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala index 2c12d4ca..6c8a2f20 100644 --- a/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala +++ b/src/test/scala/firrtlTests/CheckCombLoopsSpec.scala @@ -23,6 +23,31 @@ class CheckCombLoopsSpec extends SimpleTransformSpec { new MiddleFirrtlToLowFirrtl ) + "Loop-free circuit" should "not throw an exception" in { + val input = """circuit hasnoloops : + | module thru : + | input in1 : UInt<1> + | input in2 : UInt<1> + | output out1 : UInt<1> + | output out2 : UInt<1> + | out1 <= in1 + | out2 <= in2 + | module hasnoloops : + | input clk : Clock + | input a : UInt<1> + | output b : UInt<1> + | wire x : UInt<1> + | inst inner of thru + | inner.in1 <= a + | x <= inner.out1 + | inner.in2 <= x + | b <= inner.out2 + |""".stripMargin + + val writer = new java.io.StringWriter + compile(CircuitState(parse(input), ChirrtlForm, None), writer) + } + "Simple combinational loop" should "throw an exception" in { val input = """circuit hasloops : | module hasloops : diff --git a/src/test/scala/firrtlTests/analyses/InstanceGraphTests.scala b/src/test/scala/firrtlTests/analyses/InstanceGraphTests.scala index 300fa8c4..3e517079 100644 --- a/src/test/scala/firrtlTests/analyses/InstanceGraphTests.scala +++ b/src/test/scala/firrtlTests/analyses/InstanceGraphTests.scala @@ -11,7 +11,7 @@ import firrtl.passes._ import firrtlTests._ class InstanceGraphTests extends FirrtlFlatSpec { - private def getEdgeSet(graph: DiGraph[String]): Map[String, Set[String]] = { + private def getEdgeSet(graph: DiGraph[String]): collection.Map[String, collection.Set[String]] = { (graph.getVertices map {v => (v, graph.getEdges(v))}).toMap } diff --git a/src/test/scala/firrtlTests/graph/DiGraphTests.scala b/src/test/scala/firrtlTests/graph/DiGraphTests.scala index 9eb1c7f8..da268e4f 100644 --- a/src/test/scala/firrtlTests/graph/DiGraphTests.scala +++ b/src/test/scala/firrtlTests/graph/DiGraphTests.scala @@ -43,8 +43,8 @@ class DiGraphTests extends FirrtlFlatSpec { a [cyclicGraph.CyclicException] should be thrownBy cyclicGraph.linearize - acyclicGraph.reverse.edges should equal (reversedAcyclicGraph.edges) + acyclicGraph.reverse.getEdgeMap should equal (reversedAcyclicGraph.getEdgeMap) - degenerateGraph.edges should equal (degenerateGraph.reverse.edges) + degenerateGraph.getEdgeMap should equal (degenerateGraph.reverse.getEdgeMap) } |
