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authorAdam Izraelevitz2018-12-25 11:00:42 -0500
committerGitHub2018-12-25 11:00:42 -0500
commit370d5b499f9c02c50fbd62f3291a53fbe8aea9b3 (patch)
treed4938e2cf8df540f889896f07f691d201b190e3f /src/test
parent1d1798cfd03f23896b7ea6203a1569da9532a939 (diff)
Performance fix of Uniquify for deep bundles (#980)
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/firrtlTests/UniquifySpec.scala19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/UniquifySpec.scala b/src/test/scala/firrtlTests/UniquifySpec.scala
index 43d1e733..bf0586f3 100644
--- a/src/test/scala/firrtlTests/UniquifySpec.scala
+++ b/src/test/scala/firrtlTests/UniquifySpec.scala
@@ -283,4 +283,23 @@ class UniquifySpec extends FirrtlFlatSpec {
executeTest(input, expected)
}
+
+ it should "quickly rename deep bundles" in {
+ def mkType(i: Int): String = {
+ if(i == 0) "UInt<8>" else s"{x: ${mkType(i - 1)}}"
+ }
+
+ val depth = 500
+
+ val input =
+ s"""circuit Test:
+ | module Test :
+ | input in: ${mkType(depth)}
+ | output out: ${mkType(depth)}
+ | out <= in
+ |""".stripMargin
+
+ val (ms, _) = Utils.time(compileToVerilog(input))
+ (ms < 8000) shouldBe true
+ }
}