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authorAdam Izraelevitz2017-02-14 11:36:42 -0800
committerAdam Izraelevitz2017-02-14 13:06:20 -0800
commit208176767a8b93172e02b55fe5e5cc19891e5921 (patch)
tree99860e044e3c00026615f05e7e50d739813cd73d /src/test
parentea90b71aaf70c7e3034fef8df4968ae89026c258 (diff)
Fixes #441, ConvertFixedToSInt not recursing exps
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala b/src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala
index 4910cb5e..ce591485 100644
--- a/src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala
+++ b/src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala
@@ -14,6 +14,7 @@ class RemoveFixedTypeSpec extends FirrtlFlatSpec {
(c: Circuit, p: Pass) => p.run(c)
}
val lines = c.serialize.split("\n") map normalized
+ println(c.serialize)
expected foreach { e =>
lines should contain(e)
@@ -186,5 +187,32 @@ class RemoveFixedTypeSpec extends FirrtlFlatSpec {
val chirrtlTransform = new CheckChirrtlTransform
chirrtlTransform.execute(CircuitState(parse(input), ChirrtlForm, Some(new AnnotationMap(Seq.empty))))
}
+
+ "Fixed point numbers" should "remove nested AsFixedPoint" in {
+ val passes = Seq(
+ ToWorkingIR,
+ CheckHighForm,
+ ResolveKinds,
+ InferTypes,
+ CheckTypes,
+ ResolveGenders,
+ CheckGenders,
+ InferWidths,
+ CheckWidths,
+ ConvertFixedToSInt)
+ val input =
+ """
+ |circuit Unit :
+ | module Unit :
+ | node x = asFixedPoint(asFixedPoint(UInt(3), 0), 1)
+ """.stripMargin
+ val check =
+ """
+ |circuit Unit :
+ | module Unit :
+ | node x = asSInt(asSInt(UInt<2>("h3")))
+ """.stripMargin
+ executeTest(input, check.split("\n") map normalized, passes)
+ }
}