diff options
| author | Schuyler Eldridge | 2020-06-19 01:11:15 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2020-06-22 19:00:20 -0400 |
| commit | d66ff2357e59113ecf48c7d257edff429c4266e0 (patch) | |
| tree | 30f5d068ea78caf172008f900e3d4fde7e20f6b0 /src/test/scala/firrtlTests/InferReadWriteSpec.scala | |
| parent | 2d1e074a67483c136d5f0ed86e8ecf1b8505bc10 (diff) | |
Convert PreservesAll to explicit invalidates=false
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/test/scala/firrtlTests/InferReadWriteSpec.scala')
| -rw-r--r-- | src/test/scala/firrtlTests/InferReadWriteSpec.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/test/scala/firrtlTests/InferReadWriteSpec.scala b/src/test/scala/firrtlTests/InferReadWriteSpec.scala index 21228c27..e8be70ad 100644 --- a/src/test/scala/firrtlTests/InferReadWriteSpec.scala +++ b/src/test/scala/firrtlTests/InferReadWriteSpec.scala @@ -4,7 +4,6 @@ package firrtlTests import firrtl._ import firrtl.ir._ -import firrtl.options.PreservesAll import firrtl.passes._ import firrtl.stage.Forms import firrtl.testutils._ @@ -14,10 +13,11 @@ class InferReadWriteSpec extends SimpleTransformSpec { class InferReadWriteCheckException extends PassException( "Readwrite ports are not found!") - object InferReadWriteCheck extends Pass with PreservesAll[Transform] { + object InferReadWriteCheck extends Pass { override def prerequisites = Forms.MidForm override def optionalPrerequisites = Seq.empty override def optionalPrerequisiteOf = Forms.MidEmitters + override def invalidates(a: Transform) = false def findReadWrite(s: Statement): Boolean = s match { case s: DefMemory if s.readLatency > 0 && s.readwriters.size == 1 => |
