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authorJohn Ingalls2020-01-15 15:34:19 -0800
committermergify[bot]2020-01-15 23:34:19 +0000
commitbc8605d6e198ca38f446547a52d492ac678eda7d (patch)
treef1f4b5a9928cbf0b82bdbac536aeffdf236daf93 /src/test/scala/firrtlTests/ExtModuleTests.scala
parent0aa0ba8fac56fc81f57b24b6e0694d93de2b66df (diff)
Verilog emitter transform InlineBitExtractions (#1296)
* transform InlineBitExtractions * InlineNotsTransform, InlineBitExtractionsTransform: inputForm/outputForm = UnknownForm * clean up some minor redundancies from Adam review * clarifications from Seldrige review
Diffstat (limited to 'src/test/scala/firrtlTests/ExtModuleTests.scala')
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