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authorAlbert Chen2019-02-22 15:30:27 -0800
committermergify[bot]2019-02-22 23:30:27 +0000
commit5608aa8f42c1d69b59bee158d14fc6cef9b19a47 (patch)
tree86b7bad9c5f164d12aba9f324bde223e7ff5e9f3 /src/test/scala/firrtlTests/CheckInitializationSpec.scala
parent0ace0218d3151df2d102463dd682128a88ae7be6 (diff)
Add Width Constraints with Annotations (#956)
* refactor InferWidths to allow for extra contraints, add InferWidthsWithAnnos * add test cases * add ResolvedAnnotationPaths trait to InferWidthsWithAnnos * remove println * cleanup tests * remove extraneous constraints * use foreachStmt instead of mapStmt * remove support for aggregates * fold InferWidthsWithAnnos into InferWidths * throw exception if ref not found, check for annos before AST walk
Diffstat (limited to 'src/test/scala/firrtlTests/CheckInitializationSpec.scala')
-rw-r--r--src/test/scala/firrtlTests/CheckInitializationSpec.scala17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/test/scala/firrtlTests/CheckInitializationSpec.scala b/src/test/scala/firrtlTests/CheckInitializationSpec.scala
index ef966ca0..9ccff256 100644
--- a/src/test/scala/firrtlTests/CheckInitializationSpec.scala
+++ b/src/test/scala/firrtlTests/CheckInitializationSpec.scala
@@ -5,8 +5,7 @@ package firrtlTests
import java.io._
import org.scalatest._
import org.scalatest.prop._
-import firrtl.Parser
-import firrtl.ir.Circuit
+import firrtl.{Parser, CircuitState, UnknownForm, Transform}
import firrtl.Parser.IgnoreInfo
import firrtl.passes._
@@ -19,7 +18,7 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
CheckTypes,
ResolveGenders,
CheckGenders,
- InferWidths,
+ new InferWidths,
CheckWidths,
PullMuxes,
ExpandConnects,
@@ -35,8 +34,8 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
| when p :
| x <= UInt(1)""".stripMargin
intercept[CheckInitialization.RefNotInitializedException] {
- passes.foldLeft(parse(input)) {
- (c: Circuit, p: Pass) => p.run(c)
+ passes.foldLeft(CircuitState(parse(input), UnknownForm)) {
+ (c: CircuitState, p: Transform) => p.runTransform(c)
}
}
}
@@ -50,8 +49,8 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
| else :
| x <= UInt(1)""".stripMargin
intercept[CheckInitialization.RefNotInitializedException] {
- passes.foldLeft(parse(input)) {
- (c: Circuit, p: Pass) => p.run(c)
+ passes.foldLeft(CircuitState(parse(input), UnknownForm)) {
+ (c: CircuitState, p: Transform) => p.runTransform(c)
}
}
}
@@ -66,8 +65,8 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
| when p :
| c.in <= UInt(1)""".stripMargin
intercept[CheckInitialization.RefNotInitializedException] {
- passes.foldLeft(parse(input)) {
- (c: Circuit, p: Pass) => p.run(c)
+ passes.foldLeft(CircuitState(parse(input), UnknownForm)) {
+ (c: CircuitState, p: Transform) => p.runTransform(c)
}
}
}