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authorJack Koenig2021-03-02 15:32:24 -0800
committerGitHub2021-03-02 15:32:24 -0800
commit38dc5401ea875037e23bbbe998fb1b0f9aef7334 (patch)
tree948ea28b7dbbef0347e6e86d30b6f12854fe61f1 /src/test/scala/firrtl
parent541a70c9489ec90118d45d4c953af0d0a33f8316 (diff)
Remove Scala 2.11 (#2062)
Diffstat (limited to 'src/test/scala/firrtl')
-rw-r--r--src/test/scala/firrtl/backends/experimental/smt/end2end/SMTCompilationTest.scala3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/test/scala/firrtl/backends/experimental/smt/end2end/SMTCompilationTest.scala b/src/test/scala/firrtl/backends/experimental/smt/end2end/SMTCompilationTest.scala
index 72949830..f846e19c 100644
--- a/src/test/scala/firrtl/backends/experimental/smt/end2end/SMTCompilationTest.scala
+++ b/src/test/scala/firrtl/backends/experimental/smt/end2end/SMTCompilationTest.scala
@@ -15,8 +15,7 @@ import scala.sys.process.{Process, ProcessLogger}
class SMTCompilationTest extends AnyFlatSpec with LazyLogging {
it should "generate valid SMTLib for AddNot" taggedAs (RequiresZ3) in { compileAndParse("AddNot") }
it should "generate valid SMTLib for FPU" taggedAs (RequiresZ3) in { compileAndParse("FPU") }
- // we get a stack overflow in Scala 2.11 because of a deeply nested and(...) expression in the sequencer
- it should "generate valid SMTLib for HwachaSequencer" taggedAs (RequiresZ3) ignore {
+ it should "generate valid SMTLib for HwachaSequencer" taggedAs (RequiresZ3) in {
compileAndParse("HwachaSequencer")
}
it should "generate valid SMTLib for ICache" taggedAs (RequiresZ3) in { compileAndParse("ICache") }