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| author | Deborah Soung | 2020-05-05 12:48:05 -0700 |
|---|---|---|
| committer | GitHub | 2020-05-05 19:48:05 +0000 |
| commit | e9073463dfe77746f23afdfe782e1143a5e5be9f (patch) | |
| tree | 3fd2bcb93b388d2f1d28e0eae0bdd2616900186a /src/test/scala/firrtl/testutils | |
| parent | c9d49aa8a600a59f3cfc1dcfc9ec8729077d5107 (diff) | |
before/after initial block macros (#1550)
* adding init macros
* fix missing tick
* adding more documentation; fixing up emitter tests
* adding initial-guarding macro test
* prefixing macros with FIRRTL
* cleanup
* typo fix
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Diffstat (limited to 'src/test/scala/firrtl/testutils')
| -rw-r--r-- | src/test/scala/firrtl/testutils/FirrtlSpec.scala | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/test/scala/firrtl/testutils/FirrtlSpec.scala b/src/test/scala/firrtl/testutils/FirrtlSpec.scala index e14dc78c..8f0241fe 100644 --- a/src/test/scala/firrtl/testutils/FirrtlSpec.scala +++ b/src/test/scala/firrtl/testutils/FirrtlSpec.scala @@ -254,7 +254,9 @@ object FirrtlCheckers extends FirrtlMatchers { /** Checks that the emitted circuit has the expected line, both will be normalized */ def containLine(expectedLine: String) = containLines(expectedLine) - /** Checks that the emitted circuit has the expected lines in order, all lines will be normalized */ + /** Checks that the emitted circuit contains the expected lines contiguously and in order; + * all lines will be normalized + */ def containLines(expectedLines: String*) = new CircuitStateStringsMatcher(expectedLines) class CircuitStateStringsMatcher(expectedLines: Seq[String]) extends Matcher[CircuitState] { |