Emit legal Verilog literals for ExtModule IntParams > 32-bit (#1087)

Emit Verilog IntParams that fit in 32-bits as Integer literals

2 files changed, 50 insertions, 0 deletions

diff --git a/src/test/resources/blackboxes/LargeParam.v b/src/test/resources/blackboxes/LargeParam.v
new file mode 100644
index 00000000..84e1a1cf
--- /dev/null
+++ b/src/test/resources/blackboxes/LargeParam.v
@@ -0,0 +1,7 @@
+// See LICENSE for license details.
+module LargeParam #(parameter DATA=0, WIDTH=1) (
+  output [WIDTH-1:0] out
+);
+  assign out = DATA;
+endmodule
+
diff --git a/src/test/resources/blackboxes/LargeParamTester.fir b/src/test/resources/blackboxes/LargeParamTester.fir
new file mode 100644
index 00000000..bb0ebdf5
--- /dev/null
+++ b/src/test/resources/blackboxes/LargeParamTester.fir
@@ -0,0 +1,43 @@
+; See LICENSE for license details.
+circuit LargeParamTester :
+  extmodule LargeParam :
+    output out : UInt<1>
+
+    defname = LargeParam
+    parameter WIDTH = 1
+    parameter DATA = 0
+
+  extmodule LargeParam_1 :
+    output out : UInt<128>
+
+    defname = LargeParam
+    parameter WIDTH = 128
+    parameter DATA = 9223372036854775807000
+
+  extmodule LargeParam_2 :
+    output out : SInt<128>
+
+    defname = LargeParam
+    parameter WIDTH = 128
+    parameter DATA = -9223372036854775807000
+
+  module LargeParamTester  :
+    input clock : Clock
+    input reset : UInt<1>
+
+    inst mod1 of LargeParam
+    inst mod2 of LargeParam_1
+    inst mod3 of LargeParam_2
+
+    when not(reset) :
+      when neq(mod1.out, UInt(0)) :
+        printf(clock, UInt(1), "Assertion failed\nTest Failed!\n")
+        stop(clock, UInt(1), 1)
+      when neq(mod2.out, UInt<128>(9223372036854775807000)) :
+        printf(clock, UInt(1), "Assertion failed\nTest Failed!\n")
+        stop(clock, UInt(1), 1)
+      when neq(mod3.out, SInt<128>(-9223372036854775807000)) :
+        printf(clock, UInt(1), "Assertion failed\nTest Failed!\n")
+        stop(clock, UInt(1), 1)
+      stop(clock, UInt(1), 0)
+