diff options
| author | Jack | 2016-05-18 12:02:52 -0700 |
|---|---|---|
| committer | jackkoenig | 2016-09-12 21:30:38 -0700 |
| commit | 9edf656e11084958d9e90807a4740a57b83babfe (patch) | |
| tree | 6bddf2376fe3e64668b5e59f350cfbbcf86dfaee /src/test/resources/top.cpp | |
| parent | f7dd234f7c5a2dc03c42640db11b1d6509108643 (diff) | |
Legalize bit select. Run Legalize after PadWidths.
Bit selecting a literal resulted in invalid Verilog. Legalize now deals with
this by replacing any bits select of UInt or SInt literals with a new literal
composed of the selected bits. Legalize also is now run after PadWidths because
that pass introduces this issue.
Fixes #170
Diffstat (limited to 'src/test/resources/top.cpp')
0 files changed, 0 insertions, 0 deletions