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| author | Jim Lawson | 2018-10-31 09:21:05 -0700 |
|---|---|---|
| committer | GitHub | 2018-10-31 09:21:05 -0700 |
| commit | 297fbda180584cc3456145faecdc40418babeef1 (patch) | |
| tree | 1fcd05397b6b6b6f04bda7a98d36a1742d0ab476 /src/test/resources/features | |
| parent | 0a4bcaa4053aca16f21f899ba76b1b751cfb47b3 (diff) | |
Don't include verilog header files in "FileList" for VCS/Verilator. (#918)
When constructing the black box helper file list (firrtl_black_box_resource_files.f), filter out Verilog header files (*.vh) - Fixes #917
Diffstat (limited to 'src/test/resources/features')
0 files changed, 0 insertions, 0 deletions