diff options
| author | Donggyu | 2017-03-09 17:29:45 -0800 |
|---|---|---|
| committer | Adam Izraelevitz | 2017-03-09 17:29:45 -0800 |
| commit | e571ef88f7f69b2374fa9ba86e219523645213c6 (patch) | |
| tree | c47192c502e5d7a39143f8244a9d6423ef16abd5 /src/main | |
| parent | 664d5b33094b7158bb6f8a583a89d83ac69be83e (diff) | |
make sure infer-rw works for exclusive when statements (#481)
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/firrtl/passes/memlib/InferReadWrite.scala | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala index b941503f..9bd6a4ab 100644 --- a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala +++ b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala @@ -39,8 +39,11 @@ object InferReadWritePass extends Pass { def getProductTerms(connects: Connects)(e: Expression): Seq[Expression] = e match { // No ConstProp yet... + // TODO: do const prop before case Mux(cond, tval, fval, _) if weq(tval, one) && weq(fval, zero) => getProductTerms(connects)(cond) + case Mux(cond, tval, fval, _) if weq(fval, zero) => + getProductTerms(connects)(cond) ++ getProductTerms(connects)(tval) // Visit each term of AND operation case DoPrim(op, args, consts, tpe) if op == And => e +: (args flatMap getProductTerms(connects)) |