diff options
| author | alonamid | 2018-09-26 13:34:33 -0700 |
|---|---|---|
| committer | Jack Koenig | 2018-09-26 13:34:32 -0700 |
| commit | ba12915e9b93685107c503b3f91b96d491c48459 (patch) | |
| tree | 56d50110a0d97daaa57fa03601ddf4d555fe3818 /src/main | |
| parent | 7b4bde7e9942e9a25fd730ace5a8c6369707085e (diff) | |
Another TopWiring Bug Fix (Multi-Level Annotations) (#889)
When different levels of the circuit were annotated, the TopWiring signals of the lower levels would "run-over" the TopWiring signals of the higher levels
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/firrtl/transforms/TopWiring.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/transforms/TopWiring.scala b/src/main/scala/firrtl/transforms/TopWiring.scala index 9f78848b..80572b30 100644 --- a/src/main/scala/firrtl/transforms/TopWiring.scala +++ b/src/main/scala/firrtl/transforms/TopWiring.scala @@ -150,7 +150,7 @@ class TopWiringTransform extends Transform { sourcemods.get(module).map( _.map { case (a,b,c,path,p) => (a,b,c, inst +: path, p)}) }.flatten if (seqChildren.nonEmpty) { - sourcemods(mod.name) = seqChildren + sourcemods(mod.name) = sourcemods.getOrElse(mod.name, Seq()) ++ seqChildren } } |
