aboutsummaryrefslogtreecommitdiff
path: root/src/main
diff options
context:
space:
mode:
authorDavid Biancolin2018-12-07 00:07:55 -0800
committerDavid Biancolin2018-12-13 23:34:57 -0800
commit979ae96a1a5b7c2d5e7c196ac6ade7d563b1e143 (patch)
tree0fafceb13271636ed29fea9fdda2f1662234fa9d /src/main
parent95801dca4d5667b3a87bed58085ef7476ae87f8b (diff)
[Top Wiring] Expand top wiring to work on aggregates
Diffstat (limited to 'src/main')
-rw-r--r--src/main/scala/firrtl/transforms/TopWiring.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/transforms/TopWiring.scala b/src/main/scala/firrtl/transforms/TopWiring.scala
index 80572b30..4a6d17d4 100644
--- a/src/main/scala/firrtl/transforms/TopWiring.scala
+++ b/src/main/scala/firrtl/transforms/TopWiring.scala
@@ -36,8 +36,8 @@ case class TopWiringAnnotation(target: ComponentName, prefix: String) extends
* @note This *does* work for deduped modules
*/
class TopWiringTransform extends Transform {
- def inputForm: CircuitForm = LowForm
- def outputForm: CircuitForm = LowForm
+ def inputForm: CircuitForm = MidForm
+ def outputForm: CircuitForm = MidForm
type InstPath = Seq[String]