aboutsummaryrefslogtreecommitdiff
path: root/src/main
diff options
context:
space:
mode:
authorazidar2015-04-24 18:09:51 -0700
committerazidar2015-04-24 18:09:51 -0700
commit55a4ce521e06aa51aa005eb37c47918c0eece57c (patch)
tree75506f037898c82d68155f470b4f4f05d7d3e8c3 /src/main
parent5179919db40caddf9205f190a5dc8b33a8995e56 (diff)
parent48cb328f0bbae65800c733f4647d699db968b696 (diff)
Merge branch 'master' of github.com:ucb-bar/firrtl into parser
Diffstat (limited to 'src/main')
-rw-r--r--src/main/stanza/primop.stanza6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza
index e88a6b8e..455da396 100644
--- a/src/main/stanza/primop.stanza
+++ b/src/main/stanza/primop.stanza
@@ -272,7 +272,7 @@ public defn primop-gen-constraints (e:DoPrim,v:Vector<WGeq>) -> Type :
; new-width(PlusWidth(width!(l[0]),width!(l[1])))
println-all-debug(["Looking at " op(e) " with inputs " args(e)])
- val all-args-not-equal = list(MUX-UU-OP,MUX-SS-OP,CONCAT-OP)
+ val all-args-not-equal = to-list([MUX-UU-OP,MUX-SS-OP,CONCAT-OP,BIT-AND-OP,BIT-NOT-OP,BIT-OR-OP,BIT-XOR-OP,BIT-AND-REDUCE-OP,BIT-OR-REDUCE-OP,BIT-XOR-REDUCE-OP,AS-UINT-U-OP,AS-UINT-S-OP,AS-SINT-U-OP,AS-SINT-S-OP])
;val consts-gte-args = list(PAD-U-OP,PAD-S-OP)
@@ -327,8 +327,8 @@ public defn primop-gen-constraints (e:DoPrim,v:Vector<WGeq>) -> Type :
NEQUAL-SS-OP : IntWidth(1)
PAD-U-OP : IntWidth(consts(e)[0])
PAD-S-OP : IntWidth(consts(e)[0])
- NEG-U-OP : IntWidth(1)
- NEG-S-OP : IntWidth(1)
+ NEG-U-OP : PlusWidth(max-args-w,IntWidth(1))
+ NEG-S-OP : PlusWidth(max-args-w,IntWidth(1))
SHIFT-LEFT-U-OP : PlusWidth(max-args-w,IntWidth(consts(e)[0]))
SHIFT-LEFT-S-OP : PlusWidth(max-args-w,IntWidth(consts(e)[0]))
SHIFT-RIGHT-U-OP : MinusWidth(max-args-w,IntWidth(consts(e)[0]))