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authorAngie Wang2016-09-14 13:52:19 -0700
committerDonggyu2016-09-14 13:52:19 -0700
commit47cbab4b19df50eb47954c1ed37d15a339d37f8b (patch)
treed0f0ad0cd2f9c09390131e9bd807b63303dfb96e /src/main
parent8fc37582267b2319e5fa25818fcd1346d8e180ae (diff)
Fixed infinite loop for finding connect origin in ReplSeqMem (#300)
* Addressed the fact that a node can be connected to itself (updating reg)
Diffstat (limited to 'src/main')
-rw-r--r--src/main/scala/firrtl/passes/AnnotateMemMacros.scala9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/AnnotateMemMacros.scala b/src/main/scala/firrtl/passes/AnnotateMemMacros.scala
index af58c7c5..1d415529 100644
--- a/src/main/scala/firrtl/passes/AnnotateMemMacros.scala
+++ b/src/main/scala/firrtl/passes/AnnotateMemMacros.scala
@@ -45,7 +45,12 @@ object AnalysisUtils {
// limitation: only works in a module (stops @ module inputs)
// TODO: more thorough (i.e. a + 0 = a)
def getConnectOrigin(connects: Map[String, Expression], node: String): Expression = {
- if (connects contains node) getOrigin(connects, connects(node))
+ if (connects contains node) {
+ val exp = connects(node)
+ // handles case when a node is connected to itself (connecting reg output back to input)
+ if (exp.serialize == node) exp
+ else getOrigin(connects, exp)
+ }
else EmptyExpression
}
@@ -142,4 +147,4 @@ object AnnotateMemMacros extends Pass {
}
-// TODO: Add floorplan info?
+// TODO: Add floorplan info? \ No newline at end of file