diff options
| author | Jim Lawson | 2016-12-14 16:53:52 -0800 |
|---|---|---|
| committer | Jim Lawson | 2016-12-14 16:53:52 -0800 |
| commit | 0f13cace653fa45e907f59a060b6acd93c7bce2a (patch) | |
| tree | 2d54e3b30b77f553eedd28d20343468a644c317c /src/main | |
| parent | 1ea7b6d686a276537f3feb5a40cbe8453ba10ac8 (diff) | |
Add support for top-level use of MiddleFirrtlCompiler.
Diffstat (limited to 'src/main')
| -rw-r--r-- | src/main/scala/firrtl/ExecutionOptionsManager.scala | 8 | ||||
| -rw-r--r-- | src/main/scala/firrtl/LoweringCompilers.scala | 6 |
2 files changed, 11 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/ExecutionOptionsManager.scala b/src/main/scala/firrtl/ExecutionOptionsManager.scala index ab900a36..62ecb1c9 100644 --- a/src/main/scala/firrtl/ExecutionOptionsManager.scala +++ b/src/main/scala/firrtl/ExecutionOptionsManager.scala @@ -161,6 +161,7 @@ case class FirrtlExecutionOptions( compilerName match { case "high" => new HighFirrtlCompiler() case "low" => new LowFirrtlCompiler() + case "middle" => new MiddleFirrtlCompiler() case "verilog" => new VerilogCompiler() } } @@ -170,6 +171,7 @@ case class FirrtlExecutionOptions( case "verilog" => "v" case "low" => "lo.fir" case "high" => "hi.fir" + case "middle" => "mid.fir" case _ => throw new Exception(s"Illegal compiler name $compilerName") } @@ -247,12 +249,12 @@ trait HasFirrtlOptions { parser.opt[String]("compiler") .abbr("X") - .valueName ("<high|low|verilog>") + .valueName ("<high|middle|low|verilog>") .foreach { x => firrtlOptions = firrtlOptions.copy(compilerName = x) } .validate { x => - if (Array("high", "low", "verilog").contains(x.toLowerCase)) parser.success + if (Array("high", "middle", "low", "verilog").contains(x.toLowerCase)) parser.success else parser.failure(s"$x not a legal compiler") }.text { s"compiler to use, default is ${firrtlOptions.compilerName}" @@ -342,7 +344,7 @@ sealed trait FirrtlExecutionResult * Indicates a successful execution of the firrtl compiler, returning the compiled result and * the type of compile * - * @param emitType The name of the compiler used, currently "high", "low", or "verilog" + * @param emitType The name of the compiler used, currently "high", "middle", "low", or "verilog" * @param emitted The text result of the compilation, could be verilog or firrtl text. */ case class FirrtlExecutionSuccess(emitType: String, emitted: String) extends FirrtlExecutionResult diff --git a/src/main/scala/firrtl/LoweringCompilers.scala b/src/main/scala/firrtl/LoweringCompilers.scala index c29ce01a..44d3a757 100644 --- a/src/main/scala/firrtl/LoweringCompilers.scala +++ b/src/main/scala/firrtl/LoweringCompilers.scala @@ -119,6 +119,12 @@ class HighFirrtlCompiler extends Compiler { def transforms: Seq[Transform] = getLoweringTransforms(ChirrtlForm, HighForm) } +/** Emits middle Firrtl input circuit */ +class MiddleFirrtlCompiler extends Compiler { + def emitter = new FirrtlEmitter + def transforms: Seq[Transform] = getLoweringTransforms(ChirrtlForm, MidForm) +} + /** Emits lowered input circuit */ class LowFirrtlCompiler extends Compiler { def emitter = new FirrtlEmitter |
