All of src/ formatted with scalafmt

2 files changed, 23 insertions, 22 deletions

diff --git a/src/main/scala/tutorial/lesson1-circuit-traversal/AnalyzeCircuit.scala b/src/main/scala/tutorial/lesson1-circuit-traversal/AnalyzeCircuit.scala
index 48427af8..72f50461 100644
--- a/src/main/scala/tutorial/lesson1-circuit-traversal/AnalyzeCircuit.scala
+++ b/src/main/scala/tutorial/lesson1-circuit-traversal/AnalyzeCircuit.scala
@@ -4,9 +4,9 @@ package tutorial
 package lesson1
 
 // Compiler Infrastructure
-import firrtl.{Transform, LowForm, CircuitState, Utils}
+import firrtl.{CircuitState, LowForm, Transform, Utils}
 // Firrtl IR classes
-import firrtl.ir.{DefModule, Statement, Expression, Mux}
+import firrtl.ir.{DefModule, Expression, Mux, Statement}
 // Map functions
 import firrtl.Mappers._
 // Scala's mutable collections
@@ -26,11 +26,11 @@ class Ledger {
   private val modules = mutable.Set[String]()
   private val moduleMuxMap = mutable.Map[String, Int]()
   def foundMux(): Unit = moduleName match {
-    case None => sys.error("Module name not defined in Ledger!")
+    case None       => sys.error("Module name not defined in Ledger!")
     case Some(name) => moduleMuxMap(name) = moduleMuxMap.getOrElse(name, 0) + 1
   }
   def getModuleName: String = moduleName match {
-    case None => Utils.error("Module name not defined in Ledger!")
+    case None       => Utils.error("Module name not defined in Ledger!")
     case Some(name) => name
   }
   def setModuleName(myName: String): Unit = {
@@ -38,9 +38,9 @@ class Ledger {
     moduleName = Some(myName)
   }
   def serialize: String = {
-    modules map { myName =>
+    modules.map { myName =>
       s"$myName => ${moduleMuxMap.getOrElse(myName, 0)} muxes!"
-    } mkString "\n"
+    }.mkString("\n")
   }
 }
 
@@ -68,8 +68,10 @@ class Ledger {
   *   - https://github.com/ucb-bar/firrtl/wiki/Common-Pass-Idioms
   */
 class AnalyzeCircuit extends Transform {
+
   /** Requires the [[firrtl.ir.Circuit Circuit]] form to be "low" */
   def inputForm = LowForm
+
   /** Indicates the output [[firrtl.ir.Circuit Circuit]] form to be "low" */
   def outputForm = LowForm
 
@@ -88,7 +90,7 @@ class AnalyzeCircuit extends Transform {
      *   - "map" - classic functional programming concept
      *   - discard the returned new [[firrtl.ir.Circuit Circuit]] because circuit is unmodified
      */
-    circuit map walkModule(ledger)
+    circuit.map(walkModule(ledger))
 
     // Print our ledger
     println(ledger.serialize)
@@ -106,7 +108,7 @@ class AnalyzeCircuit extends Transform {
      *   - return the new [[firrtl.ir.DefModule DefModule]] (in this case, its identical to m)
      *   - if m does not contain [[firrtl.ir.Statement Statement]], map returns m.
      */
-    m map walkStatement(ledger)
+    m.map(walkStatement(ledger))
   }
 
   /** Deeply visits every [[firrtl.ir.Statement Statement]] and [[firrtl.ir.Expression Expression]] in s. */
@@ -116,13 +118,13 @@ class AnalyzeCircuit extends Transform {
      *   - discard the new [[firrtl.ir.Statement Statement]] (in this case, its identical to s)
      *   - if s does not contain [[firrtl.ir.Expression Expression]], map returns s.
      */
-    s map walkExpression(ledger)
+    s.map(walkExpression(ledger))
 
     /* Execute the function walkStatement(ledger) on every [[firrtl.ir.Statement Statement]] in s.
      *   - return the new [[firrtl.ir.Statement Statement]] (in this case, its identical to s)
      *   - if s does not contain [[firrtl.ir.Statement Statement]], map returns s.
      */
-    s map walkStatement(ledger)
+    s.map(walkStatement(ledger))
   }
 
   /** Deeply visits every [[firrtl.ir.Expression Expression]] in e.
@@ -135,7 +137,7 @@ class AnalyzeCircuit extends Transform {
       *   - return the new [[firrtl.ir.Expression Expression]] (in this case, its identical to e)
       *   - if s does not contain [[firrtl.ir.Expression Expression]], map returns e.
       */
-    val visited = e map walkExpression(ledger)
+    val visited = e.map(walkExpression(ledger))
 
     visited match {
       // If e is a [[firrtl.ir.Mux Mux]], increment our ledger and return e.
diff --git a/src/main/scala/tutorial/lesson2-ir-fields/AnalyzeCircuit.scala b/src/main/scala/tutorial/lesson2-ir-fields/AnalyzeCircuit.scala
index 523be723..11b4519c 100644
--- a/src/main/scala/tutorial/lesson2-ir-fields/AnalyzeCircuit.scala
+++ b/src/main/scala/tutorial/lesson2-ir-fields/AnalyzeCircuit.scala
@@ -4,9 +4,9 @@ package tutorial
 package lesson2
 
 // Compiler Infrastructure
-import firrtl.{Transform, LowForm, CircuitState}
+import firrtl.{CircuitState, LowForm, Transform}
 // Firrtl IR classes
-import firrtl.ir.{DefModule, Statement, Expression, Mux, DefInstance}
+import firrtl.ir.{DefInstance, DefModule, Expression, Mux, Statement}
 // Map functions
 import firrtl.Mappers._
 // Scala's mutable collections
@@ -27,7 +27,7 @@ class Ledger {
   private val moduleMuxMap = mutable.Map[String, Int]()
   private val moduleInstanceMap = mutable.Map[String, Seq[String]]()
   def getModuleName: String = moduleName match {
-    case None => sys.error("Module name not defined in Ledger!")
+    case None       => sys.error("Module name not defined in Ledger!")
     case Some(name) => name
   }
   def setModuleName(myName: String): Unit = {
@@ -47,14 +47,14 @@ class Ledger {
   private def countMux(myName: String): Int = {
     val myMuxes = moduleMuxMap.getOrElse(myName, 0)
     val myInstanceMuxes =
-      moduleInstanceMap.getOrElse(myName, Nil).foldLeft(0) {
-        (total, name) => total + countMux(name)
+      moduleInstanceMap.getOrElse(myName, Nil).foldLeft(0) { (total, name) =>
+        total + countMux(name)
       }
     myMuxes + myInstanceMuxes
   }
   // Display recursive total of muxes
   def serialize: String = {
-    modules map { myName => s"$myName => ${countMux(myName)} muxes!" } mkString "\n"
+    modules.map { myName => s"$myName => ${countMux(myName)} muxes!" }.mkString("\n")
   }
 }
 
@@ -76,7 +76,6 @@ class Ledger {
   *   - Kind -> ExpKind
   *   - Flow -> UnknownFlow
   *   - Type -> UnknownType
-  *
   */
 class AnalyzeCircuit extends Transform {
   def inputForm = LowForm
@@ -88,7 +87,7 @@ class AnalyzeCircuit extends Transform {
     val circuit = state.circuit
 
     // Execute the function walkModule(ledger) on all [[DefModule]] in circuit
-    circuit map walkModule(ledger)
+    circuit.map(walkModule(ledger))
 
     // Print our ledger
     println(ledger.serialize)
@@ -103,13 +102,13 @@ class AnalyzeCircuit extends Transform {
     ledger.setModuleName(m.name)
 
     // Execute the function walkStatement(ledger) on every [[Statement]] in m.
-    m map walkStatement(ledger)
+    m.map(walkStatement(ledger))
   }
 
   // Deeply visits every [[Statement]] and [[Expression]] in s.
   def walkStatement(ledger: Ledger)(s: Statement): Statement = {
     // Map the functions walkStatement(ledger) and walkExpression(ledger)
-    val visited = s map walkStatement(ledger) map walkExpression(ledger)
+    val visited = s.map(walkStatement(ledger)).map(walkExpression(ledger))
     visited match {
       case DefInstance(info, name, module, tpe) =>
         ledger.foundInstance(module)
@@ -122,7 +121,7 @@ class AnalyzeCircuit extends Transform {
   def walkExpression(ledger: Ledger)(e: Expression): Expression = {
     // Execute the function walkExpression(ledger) on every [[Expression]] in e,
     //  then handle if a [[Mux]].
-    e map walkExpression(ledger) match {
+    e.map(walkExpression(ledger)) match {
       case mux: Mux =>
         ledger.foundMux()
         mux