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| author | Adam Izraelevitz | 2017-03-06 16:57:53 -0800 |
|---|---|---|
| committer | GitHub | 2017-03-06 16:57:53 -0800 |
| commit | 132d7baa991501e8c07cac7f6f4efc52905a89e7 (patch) | |
| tree | f69580b93d93fa5c01606aad2ea1e7c305d2e11f /src/main/scala/tutorial | |
| parent | 881ad9a445bb6c949896d875abbb58541382aa96 (diff) | |
Zero width (#402)
* Added Zero width wires.
Semantics:
- No change to width inference rules, e.g.
a<0> + b<2> = c<3>
- Replace zero width wires with UInt<1>(0) or SInt<1>(0)
- Performs constant prop.
- Redo width/type inference
* Remove errant println
* Moved ZeroWidth after ConvertFixedToSInt
* Added more tests, bugfix match on connect
Also replaced constprop with infertypes for correctness
* Updated to new emitter and test infrastructure
Diffstat (limited to 'src/main/scala/tutorial')
0 files changed, 0 insertions, 0 deletions