diff options
| author | Schuyler Eldridge | 2020-06-19 01:11:15 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2020-06-22 19:00:20 -0400 |
| commit | d66ff2357e59113ecf48c7d257edff429c4266e0 (patch) | |
| tree | 30f5d068ea78caf172008f900e3d4fde7e20f6b0 /src/main/scala/firrtl/passes/Legalize.scala | |
| parent | 2d1e074a67483c136d5f0ed86e8ecf1b8505bc10 (diff) | |
Convert PreservesAll to explicit invalidates=false
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/Legalize.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/Legalize.scala | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/Legalize.scala b/src/main/scala/firrtl/passes/Legalize.scala index 7a59605a..8b7b733a 100644 --- a/src/main/scala/firrtl/passes/Legalize.scala +++ b/src/main/scala/firrtl/passes/Legalize.scala @@ -3,14 +3,14 @@ package firrtl.passes import firrtl.PrimOps._ import firrtl.Utils.{BoolType, error, zero} import firrtl.ir._ -import firrtl.options.{PreservesAll, Dependency} +import firrtl.options.Dependency import firrtl.transforms.ConstantPropagation import firrtl.{Transform, bitWidth} import firrtl.Mappers._ // Replace shr by amount >= arg width with 0 for UInts and MSB for SInts // TODO replace UInt with zero-width wire instead -object Legalize extends Pass with PreservesAll[Transform] { +object Legalize extends Pass { override def prerequisites = firrtl.stage.Forms.MidForm :+ Dependency(LowerTypes) @@ -18,6 +18,8 @@ object Legalize extends Pass with PreservesAll[Transform] { override def optionalPrerequisiteOf = Seq.empty + override def invalidates(a: Transform) = false + private def legalizeShiftRight(e: DoPrim): Expression = { require(e.op == Shr) e.args.head match { |
