All of src/ formatted with scalafmt

1 files changed, 17 insertions, 14 deletions

diff --git a/src/main/scala/firrtl/checks/CheckResets.scala b/src/main/scala/firrtl/checks/CheckResets.scala
index 06bd5cba..a17e3e7b 100644
--- a/src/main/scala/firrtl/checks/CheckResets.scala
+++ b/src/main/scala/firrtl/checks/CheckResets.scala
@@ -14,8 +14,8 @@ import scala.collection.mutable
 import scala.annotation.tailrec
 
 object CheckResets {
-  class NonLiteralAsyncResetValueException(info: Info, mname: String, reg: String, init: String) extends PassException(
-    s"$info: [module $mname] AsyncReset Reg '$reg' reset to non-literal '$init'")
+  class NonLiteralAsyncResetValueException(info: Info, mname: String, reg: String, init: String)
+      extends PassException(s"$info: [module $mname] AsyncReset Reg '$reg' reset to non-literal '$init'")
 
   // Map of Initialization Expression to check
   private type RegCheckList = mutable.ListBuffer[(Expression, DefRegister)]
@@ -31,9 +31,11 @@ object CheckResets {
 class CheckResets extends Transform with DependencyAPIMigration {
 
   override def prerequisites =
-    Seq( Dependency(passes.LowerTypes),
-         Dependency(passes.Legalize),
-         Dependency(firrtl.transforms.RemoveReset) ) ++ firrtl.stage.Forms.MidForm
+    Seq(
+      Dependency(passes.LowerTypes),
+      Dependency(passes.Legalize),
+      Dependency(firrtl.transforms.RemoveReset)
+    ) ++ firrtl.stage.Forms.MidForm
 
   override def optionalPrerequisites = Seq(Dependency[firrtl.transforms.CheckCombLoops])
 
@@ -45,10 +47,10 @@ class CheckResets extends Transform with DependencyAPIMigration {
 
   private def onStmt(regCheck: RegCheckList, drivers: DirectDriverMap)(stmt: Statement): Unit = {
     stmt match {
-      case DefNode(_, name, expr) => drivers += we(WRef(name)) -> expr
-      case Connect(_, lhs, rhs) => drivers += we(lhs) -> rhs
-      case reg @ DefRegister(_, name, _,_,_, init) if weq(WRef(name), init) => // Self-reset, allowed!
-      case reg @ DefRegister(_,_,_,_, reset, init) if reset.tpe == AsyncResetType =>
+      case DefNode(_, name, expr)                                             => drivers += we(WRef(name)) -> expr
+      case Connect(_, lhs, rhs)                                               => drivers += we(lhs) -> rhs
+      case reg @ DefRegister(_, name, _, _, _, init) if weq(WRef(name), init) => // Self-reset, allowed!
+      case reg @ DefRegister(_, _, _, _, reset, init) if reset.tpe == AsyncResetType =>
         regCheck += init -> reg
       case _ => // Do nothing
     }
@@ -60,11 +62,12 @@ class CheckResets extends Transform with DependencyAPIMigration {
   @tailrec
   private def findDriver(drivers: DirectDriverMap)(expr: Expression): Expression = expr match {
     case lit: Literal => lit
-    case DoPrim(op, args, _,_) if isCast(op) => findDriver(drivers)(args.head)
-    case other => drivers.get(we(other)) match {
-      case Some(e) if wireOrNode(Utils.kind(other)) => findDriver(drivers)(e)
-      case _ => other
-    }
+    case DoPrim(op, args, _, _) if isCast(op) => findDriver(drivers)(args.head)
+    case other =>
+      drivers.get(we(other)) match {
+        case Some(e) if wireOrNode(Utils.kind(other)) => findDriver(drivers)(e)
+        case _                                        => other
+      }
   }
 
   private def onMod(errors: Errors)(mod: DefModule): Unit = {