diff options
| author | Adam Izraelevitz | 2016-10-17 18:53:19 -0700 |
|---|---|---|
| committer | Angie Wang | 2016-10-17 18:53:19 -0700 |
| commit | 85baeda249e59c7d9d9f159aaf29ff46d685cf02 (patch) | |
| tree | cfb5f4a6a0a80f9033275de6e5e36b9d5b96faad /src/main/scala/firrtl/LoweringCompilers.scala | |
| parent | 7d08b9a1486fef0459481f6e542464a29fbe1db5 (diff) | |
Reorganized memory blackboxing (#336)
* Reorganized memory blackboxing
Moved to new package memlib
Added comments
Moved utility functions around
Removed unused AnnotateValidMemConfigs.scala
* Fixed tests to pass
* Use DefAnnotatedMemory instead of AppendableInfo
* Broke passes up into simpler passes
AnnotateMemMacros ->
(ToMemIR, ResolveMaskGranularity)
UpdateDuplicateMemMacros ->
(RenameAnnotatedMemoryPorts, ResolveMemoryReference)
* Fixed to make tests run
* Minor changes from code review
* Removed vim comments and renamed ReplSeqMem
Diffstat (limited to 'src/main/scala/firrtl/LoweringCompilers.scala')
| -rw-r--r-- | src/main/scala/firrtl/LoweringCompilers.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/LoweringCompilers.scala b/src/main/scala/firrtl/LoweringCompilers.scala index 307ef9d1..53491922 100644 --- a/src/main/scala/firrtl/LoweringCompilers.scala +++ b/src/main/scala/firrtl/LoweringCompilers.scala @@ -192,7 +192,7 @@ class LowFirrtlCompiler extends Compiler { new ResolveAndCheck, new HighFirrtlToMiddleFirrtl, new passes.InferReadWrite(TransID(-1)), - new passes.ReplSeqMem(TransID(-2)), + new passes.memlib.ReplSeqMem(TransID(-2)), new MiddleFirrtlToLowFirrtl, new EmitFirrtl(writer) ) @@ -206,7 +206,7 @@ class VerilogCompiler extends Compiler { new ResolveAndCheck, new HighFirrtlToMiddleFirrtl, new passes.InferReadWrite(TransID(-1)), - new passes.ReplSeqMem(TransID(-2)), + new passes.memlib.ReplSeqMem(TransID(-2)), new MiddleFirrtlToLowFirrtl, new passes.InlineInstances(TransID(0)), new EmitVerilogFromLowFirrtl(writer) |